Abstract: A design verification system verifies an electronic device design based on a static model of the electronic device. The static model is an expression of the relationships between modules of the electronic device design and relationships between the behaviors of those modules that can be expressed as set of logical relationships. The static model does not rely on a time variable, but instead reflects a fixed set of relationships between the electronic device modules and between behaviors of the electronic device modules. The static model can be employed by a solver, that identifies whether or how the mathematical relationships of the static model can be reconciled, given a set of constraints. The solver results can be analyzed to identify whether there are errors in the device design, such as resource conflicts, failure of the design to achieve a desired configuration, and the like.

Abstract: A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.

Abstract: A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.

Abstract: A design verification system automatically identifies coverage of different constraints for a static model of an electronic device. The static model can be employed by a tool, referred to as a solver, that identifies whether the mathematical relationships of the static model can be reconciled, given a set of user-defined constraints that indicate a desired configuration, or range of configurations, of the electronic device. After a solution for a particular set of user-defined constraints has been identified, a constraints adjustment module can identify, based on coverage information generated by the solver, if other sets of user-defined constraints were implicitly solved by the solver. If such other sets were implicitly solved, the adjustments module can mark the sets as solved, such that they will omitted from constraints used for subsequent solutions of the solver.

Abstract: A design verification system verifies an electronic device design based on a static model of the electronic device. The static model is an expression of the relationships between modules of the electronic device design and relationships between the behaviors of those modules that can be expressed as set of logical relationships. The static model does not rely on a time variable, but instead reflects a fixed set of relationships between the electronic device modules and between behaviors of the electronic device modules. The static model can be employed by a solver, that identifies whether or how the mathematical relationships of the static model can be reconciled, given a set of constraints. The solver results can be analyzed to identify whether there are errors in the device design, such as resource conflicts, failure of the design to achieve a desired configuration, and the like.

Abstract: A design verification system automatically identifies coverage of different constraints for a static model of an electronic device. The static model can be employed by a tool, referred to as a solver, that identifies whether the mathematical relationships of the static model can be reconciled, given a set of user-defined constraints that indicate a desired configuration, or range of configurations, of the electronic device. After a solution for a particular set of user-defined constraints has been identified, a constraints adjustment module can identify, based on coverage information generated by the solver, if other sets of user-defined constraints were implicitly solved by the solver. If such other sets were implicitly solved, the adjustments module can mark the sets as solved, such that they will omitted from constraints used for subsequent solutions of the solver.