Abstract: A method and apparatus for testing data processing systems having a plurality of peripheral units connected over a bus line system to a central control is described. Check instructions are sent over the bus line in order to obtain predetermined answerbacks so as to check the answerbacks. For checking the address decoding in the peripheral units a first check instruction and the address of a peripheral unit are sent from the central control. The addressed peripheral unit reports back its address to the central control, and the received message in the central control is compared with the sent address. Thereafter, a second check instruction and the same address are sent from the central control. The addressed peripheral unit reports back its address in inverted form, and this received message is processed with the previously sent address.