Patents by Inventor Hugues Marchand
Hugues Marchand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11133408Abstract: A passivated semiconductor device structure includes a III-nitride structure and a passivation layer. The III-nitride structure includes a high electron mobility transistor (HEMT). The passivation layer includes a dielectric, which is formed over the structure to provide passivation and forms an interface with the structure. The interface provides a transition between the structure and the dielectric having a thickness of at least two atomic layers. The interface also has a characteristic density of interface states less than a reference density of interface states that corresponds to a thickness of at most one atomic layer. The transition, which constitutes a rough interface, allows a relatively low density of interface states, and thus improves high-frequency performance of the device structure.Type: GrantFiled: August 6, 2019Date of Patent: September 28, 2021Assignee: IQE plcInventors: Oleg Laboutin, Xiang Gao, Hugues Marchand
-
Publication number: 20210043760Abstract: A passivated semiconductor device structure includes a III-nitride structure and a passivation layer. The III-nitride structure includes a high electron mobility transistor (HEMT). The passivation layer includes a dielectric, which is formed over the structure to provide passivation and forms an interface with the structure. The interface provides a transition between the structure and the dielectric having a thickness of at least two atomic layers. The interface also has a characteristic density of interface states less than a reference density of interface states that corresponds to a thickness of at most one atomic layer. The transition, which constitutes a rough interface, allows a relatively low density of interface states, and thus improves high-frequency performance of the device structure.Type: ApplicationFiled: August 6, 2019Publication date: February 11, 2021Inventors: Oleg Laboutin, Xiang Gao, Hugues Marchand
-
Patent number: 10580871Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.Type: GrantFiled: March 12, 2018Date of Patent: March 3, 2020Assignee: IQE plcInventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
-
Patent number: 10347794Abstract: Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.Type: GrantFiled: April 17, 2015Date of Patent: July 9, 2019Assignee: Qromis, Inc.Inventors: Anthony Lochtefeld, Hugues Marchand
-
Publication number: 20180277639Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.Type: ApplicationFiled: March 12, 2018Publication date: September 27, 2018Inventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
-
Patent number: 9917156Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.Type: GrantFiled: September 2, 2016Date of Patent: March 13, 2018Assignee: IQE, plcInventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
-
Publication number: 20180069085Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.Type: ApplicationFiled: September 2, 2016Publication date: March 8, 2018Inventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
-
Patent number: 9691712Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: GrantFiled: August 22, 2014Date of Patent: June 27, 2017Assignee: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
Publication number: 20170170283Abstract: A III-nitride structure can include a silicon substrate, a nucleation layer over the silicon substrate, and a carbon-doped buffer layer over the nucleation layer. The carbon-doped buffer layer can include a III-nitride material and a concentration of carbon that is greater than 1×1020 cm?3. The III-nitride structure can include a III-nitride channel layer over the carbon-doped buffer layer and a III-nitride barrier layer over the III-nitride channel layer. The carbon doping to a carbon concentration greater than 1×1020 cm?3 can increase the compressive stress in the III-nitride structure.Type: ApplicationFiled: December 5, 2016Publication date: June 15, 2017Inventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Hugues Marchand, Rodney Pelzel
-
Patent number: 9129977Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: GrantFiled: November 29, 2011Date of Patent: September 8, 2015Assignee: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
GALLIUM NITRIDE WAFER SUBSTRATE FOR SOLID STATE LIGHTING DEVICES, AND ASSOCIATED SYSTEMS AND METHODS
Publication number: 20150221832Abstract: Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.Type: ApplicationFiled: April 17, 2015Publication date: August 6, 2015Inventors: Anthony Lochtefeld, Hugues Marchand -
Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods
Patent number: 9012253Abstract: Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.Type: GrantFiled: December 15, 2010Date of Patent: April 21, 2015Assignee: Micron Technology, Inc.Inventors: Anthony Lochtefeld, Hugues Marchand -
Publication number: 20150021621Abstract: This disclosure provides a transistor device formed on a wide band gap substrate. The transistor device includes a channel layer and a gate structure physically coupled to the channel layer. The gate structure can be formed on the channel layer using an epitaxial process instead of a lithographic process, thereby providing a mechanism to build small semiconductor features that are smaller than a resolution of the state-of-the-art lithographic process and reducing the amount of impurities between the channel layer and the gate structure.Type: ApplicationFiled: July 21, 2014Publication date: January 22, 2015Inventors: Bunmi T. ADEKORE, Hugues MARCHAND
-
Publication number: 20140367698Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: ApplicationFiled: August 22, 2014Publication date: December 18, 2014Applicant: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
Patent number: 8525230Abstract: A field effect transistor including a compositionally graded group-III nitride layer on a silicon substrate.Type: GrantFiled: October 11, 2010Date of Patent: September 3, 2013Assignee: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
Publication number: 20120068191Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: ApplicationFiled: November 29, 2011Publication date: March 22, 2012Applicant: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
GALLIUM NITRIDE WAFER SUBSTRATE FOR SOLID STATE LIGHTING DEVICES, AND ASSOCIATED SYSTEMS AND METHODS
Publication number: 20110147772Abstract: Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.Type: ApplicationFiled: December 15, 2010Publication date: June 23, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Anthony Lochtefeld, Hugues Marchand -
Publication number: 20110108886Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: ApplicationFiled: October 11, 2010Publication date: May 12, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Hugues Marchand, Brendan J. Moran, Umesh K. Mishra, James S. Speck
-
Patent number: 7816764Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: GrantFiled: May 22, 2009Date of Patent: October 19, 2010Assignee: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan Jude Moran
-
Patent number: 7687888Abstract: Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.Type: GrantFiled: August 3, 2001Date of Patent: March 30, 2010Assignee: The Regents of the University of CaliforniaInventors: Hugues Marchand, Brendan Jude Moran