Patents by Inventor Hui Chang

Hui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Publication number: 20240145297
    Abstract: A structure includes a dielectric layer, and a metal line in the dielectric layer. The metal line has a first straight edge and a second straight edge extending in a lengthwise direction of the metal line. The first straight edge and the second straight edge are parallel to each other. A via is underlying and joined to the metal line. The via has a third straight edge underlying and vertically aligned to the first straight edge, and a first curved edge and a second curved edge connecting to opposite ends of the third straight edge.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Yu-Tse Lai, Ya Hui Chang
  • Publication number: 20240141427
    Abstract: Presented herein are altered polymerase enzymes for improved incorporation of nucleotides and nucleotide analogues, in particular altered polymerases that maintain low error rate, low phasing rate, or increased incorporation rate for a second generation ffN under reduced incorporation times, as well as methods and kits using the same.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 2, 2024
    Applicant: ILLUMINA, INC.
    Inventors: Misha Golynskiy, Rahman Rahman Pour, Jiawen Li, Ryan Craig, Hamed Tabatabaei Ghomi, Saurabh Nirantar, Hsu Myat Noe, Lin Hui Chang, Yvonne Devadas, Jing Wen Lim, Kay Klausing, Humberto Rojo, Eric Murtfeldt, Chris Garcia
  • Patent number: 11973944
    Abstract: In this specification, a image decoding method is disclosed. The image decoding method of the present invention comprises, decoding block partition information of a current block included in a current picture, determining a partitioning scheme for the current block according to the block partition information and partitioning the current block using the partitioning scheme determined, wherein the partitioning scheme is determined according to whether the current block includes a boundary of the current picture.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 30, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jung Won Kang, Jin Ho Lee, Ha Hyun Lee, Hui Yong Kim
  • Publication number: 20240137503
    Abstract: An image encoding/decoding method is disclosed. A method of decoding an image, the method comprising, deriving an intra prediction mode for a current block, decoding at least one original sample that is present in a rightmost column and a bottommost row (a bottom row) of the current block, constructing a reference sample by using the at least one decoded original sample and performing intra prediction on the current block by using the constructed reference sample.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240137507
    Abstract: The present invention relates to a video encoding/decoding method and apparatus. The video decoding method according to the present invention may comprise decoding filter information on a coding unit; classifying samples in the coding unit into classes on a per block classification unit basis; and filtering the coding unit having the samples classified into the classes on a per block classification unit basis by using the filter information.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hyun Suk KO, Jin Ho LEE, Hui Yong KIM
  • Patent number: 11968869
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11968512
    Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: April 23, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yen-Hsin Ho, Yi-Ying Lai, Chen-Hui Hu, Chen-Yu Chang
  • Patent number: 11962766
    Abstract: The present invention relates to an encoding method and decoding method, and a device using the same. The encoding method according to the present invention comprises the steps of: specifying an intra prediction mode for a current block; and scanning a residual signal by intra prediction of the current block, wherein the step of scanning the residual signal can determine a scanning type for a luminance signal and a chroma signal of the current block according to an intra prediction mode for a luminance sample of the current block.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: April 16, 2024
    Assignees: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
  • Patent number: 11962803
    Abstract: The multi sample prediction method of the present invention comprises the steps of: determining a sample group consisting of a plurality of samples inside a decoding target block; determining a representative position corresponding to the sample group, inside the decoding target block; determining a representative prediction value for the sample group, on the basis of the determined representative position; and determining the determined representative prediction value as the final prediction value for each of the plurality of samples making up the sample group. The present invention enhances efficiency in encoding/decoding and reduces complexity thereof.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: April 16, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Ho Lee, Hui Yong Kim, Sung Chang Lim, Jong Ho Kim, Ha Hyun Lee, Jin Soo Choi, Jin Woong Kim
  • Patent number: 11961919
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Chang, Hsiu-Hao Tsao, Ming-Jhe Sie, Shun-Hui Yang, Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen
  • Patent number: 11960769
    Abstract: A memory device includes a command decoder that implements security logic to detect a command sequence to read a security region of a memory array with continuous encrypted data and to output/input specific contexts for the data. Output/input of specific contexts can be during a dummy cycle to achieve greater performance. A host interfacing can, for example, execute a single command to both get the encrypted data and specific contexts that were used to encrypt the data. Our technology can implement transferring data on the system bus in ciphertext and encrypted by a different Nonce or a different session key than used in a previous transfer operation. In this way, data will be represented with different ciphertext on the bus at different sessions; thereby defending against a replay attack.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: April 16, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chia-Jung Chen, Chin-Hung Chang, Ken-Hui Chen
  • Patent number: 11960138
    Abstract: An active alignment machine includes a base, a first pillar, a second pillar, a distribution module, a first alignment module, a second alignment module and a third alignment module. The first pillar has a first pillar top surface. The second pillar has a second pillar top surface. The first pillar top surface and the second pillar top surface cooperatively support plural assembling specifications. The distribution module is installed on the base and arranged between the first pillar and the second pillar. The first alignment module, the second alignment module and third alignment module are replaceable to be assembled with or dissembled from the first pillar top surface and the second pillar top surface. The first alignment module, the second alignment module and third alignment module work with the distribution module to perform the active alignment on a first-type product, a second-type product and a third-type product, respectively.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: April 16, 2024
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Ching-Hui Chang, Yi-Hou Chen
  • Patent number: 11959960
    Abstract: A voltage tracking circuit includes first, second, third and fourth transistors. The first transistor is in a first well, and includes a first gate, a first drain and a first source coupled to a first voltage supply. The second transistor includes a second gate, a second drain and a second source. The second source is coupled to the first drain. The second gate is coupled to the first gate and a pad voltage terminal. The second body terminal is coupled to a first node. The third transistor includes a third gate, a third drain and a third source. The fourth transistor includes a fourth gate, a fourth drain and a fourth source. The fourth drain is coupled to the third source. The fourth source is coupled to the pad voltage terminal. The second transistor is in a second well different from the first well, and is separated from the first well in a first direction.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiang-Hui Cheng, Chia-Jung Chang
  • Publication number: 20240118806
    Abstract: Systems, devices, methods, and circuits for managing content addressable memory (CAM) devices. In one aspect, a semiconductor device includes: a memory cell array configured to store data in memory cells, and a circuitry coupled to the memory cell array and configured to execute a search operation in the memory cell array according to a search instruction. The search instruction includes at least one of search data or an option code, and the option code specifies, for the search operation, at least one of a search length or a search depth.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Applicant: Macronix International Co., Ltd.
    Inventors: Chin-Hung Chang, Ken-Hui Chen, Chun-Hsiung Hung
  • Publication number: 20240121385
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Patent number: 11950937
    Abstract: A probe cover for an ear thermometer and a grouping method of the same are provided. The probe cover for the ear thermometer includes a conical main body having a closed end and an open end, an annular elastomer, and a flange. The closed end is penetrable by infrared rays, and has different infrared transmittances according to thickness variations of the closed end. The annular elastomer is located between the conical main body and the flange. The flange has a plurality of detection positions, each of which having a positive detection pattern or a negative detection pattern, such that the detection positions are arranged to form a plurality of different detection combinations. The different detection combinations respectively correspond to the different infrared transmittances, and any two of the different detection combinations have the two corresponding infrared transmittances that are different from one another.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: April 9, 2024
    Assignee: RADIANT INNOVATION INC.
    Inventors: Yung-Chang Chang, Tseng-Lung Lin, Chin-Hui Ku