Patents by Inventor Hui-Chin Huang

Hui-Chin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11508739
    Abstract: A method of manufacturing a memory structure including the following steps is provided. A first pad layer is formed on a substrate. Isolation structures are formed in the first pad layer and the substrate. At least one shape modification treatment is performed on the isolation structures. Each shape modification treatment includes the following steps. A first etching process is performed on the first pad layer to reduce a height of the first pad layer and to form first openings exposing sidewalls of the isolation structures. After the first etching process is performed, a second etching process is performed on the isolation structures to modify shapes of the sidewalls of the isolation structures exposed by the first openings. The first pad layer is removed to form a second opening between two adjacent isolation structures.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 22, 2022
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Hui-Chin Huang, Kai-Yao Shih, Yu-Mei Liao, Hsin-Yi Liao
  • Publication number: 20210320113
    Abstract: A method of manufacturing a memory structure including the following steps is provided. A first pad layer is formed on a substrate. Isolation structures are formed in the first pad layer and the substrate. At least one shape modification treatment is performed on the isolation structures. Each shape modification treatment includes the following steps. A first etching process is performed on the first pad layer to reduce a height of the first pad layer and to form first openings exposing sidewalls of the isolation structures. After the first etching process is performed, a second etching process is performed on the isolation structures to modify shapes of the sidewalls of the isolation structures exposed by the first openings. The first pad layer is removed to form a second opening between two adjacent isolation structures.
    Type: Application
    Filed: May 21, 2020
    Publication date: October 14, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Hui-Chin Huang, Kai-Yao Shih, Yu-Mei Liao, Hsin-Yi Liao
  • Publication number: 20180254316
    Abstract: The invention provides a manufacturing method of a metal-insulator-metal device, including: forming a first metal layer, an insulation layer, and a second metal layer sequentially on a base to form a metal-insulator-metal structure; forming a patterned mask layer on at least a portion of the second metal layer, etching the second metal layer and the insulation layer on which the patterned mask layer is not formed using an etchant without carbon; and cleaning the etched metal-insulator-metal structure using a mixed solution containing oxidants and metal oxide etchants to remove excess polymer remaining on the metal-insulator-metal structure.
    Type: Application
    Filed: June 14, 2017
    Publication date: September 6, 2018
    Applicant: Powerchip Technology Corporation
    Inventors: Hsin Tai, Po-Cheng Chang, Hui-Chin Huang, Pei-Ting Tou, Ming-Chen Lu