Patents by Inventor Hui-Ching Feng

Hui-Ching Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250006864
    Abstract: A semiconductor device is provided, which includes an epitaxial structure, a first contact electrode and a second contact electrode. The epitaxial structure includes a first semiconductor structure, a second semiconductor structure and an active region. The first semiconductor structure includes a first semiconductor contact layer. The second semiconductor structure includes a second semiconductor contact layer. The active region is located between the first semiconductor structure and the second semiconductor structure. The first contact electrode is located on the second semiconductor contact layer and directly contacts the first semiconductor contact layer. The second contact electrode is located on the second semiconductor contact layer and directly contacts the second semiconductor contact layer. The first semiconductor contact layer has a conductivity type of n-type and includes a first group III-V semiconductor material.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 2, 2025
    Inventors: Yi-Chieh LIN, Shih-Chang LEE, Wei-Chu LIAO, Mei-Chun LIU, Hui-Ching FENG, Zhen-Kai KAO, Yih-Hua RENN, Min-Hsun HSIEH
  • Publication number: 20240405054
    Abstract: A monolithic array chip comprises a first semiconductor layer; a common electrode located on the first semiconductor layer; a first light-emitting unit with a first electrode located on the first semiconductor layer; a second light-emitting unit with a second electrode located on the first semiconductor layer; a third light-emitting unit with a third electrode located on the first semiconductor layer, wherein the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are separated from each other by a trench.
    Type: Application
    Filed: May 30, 2024
    Publication date: December 5, 2024
    Inventors: Min-Hsun HSIEH, Chih-Ming WANG, Jan-Way CHIEN, Hui-Ching FENG, Yu-Chi WANG, Hsia-Ching CHENG
  • Patent number: 10658547
    Abstract: A light emitting diode (LED) structure including a stacked semiconductor layer, a contact layer and a dielectric reflective layer is provided. The stacked semiconductor layer includes a first type doped layer, a second type doped layer and an active layer disposed between the first type doped layer and the second type doped layer, wherein the first type doped layer, the active layer and the second type doped layer are penetrated by a plurality of recesses. The contact layer is disposed on the second type doped layer. The dielectric reflective layer is disposed on the contact layer and extended into the recesses to connect the contact layer and the first type doped layer with a coverage rate equal to or less than 60% from a top view of the LED structure.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: May 19, 2020
    Assignee: Epistar Corporation
    Inventors: Cheng-Kuang Yang, Hui-Ching Feng, Chien-Pin Hsu, Kuo-Hui Yu, Shyi-Ming Pan
  • Publication number: 20180342650
    Abstract: A light emitting diode (LED) structure including a stacked semiconductor layer, a contact layer and a dielectric reflective layer is provided. The stacked semiconductor layer includes a first type doped layer, a second type doped layer and an active layer disposed between the first type doped layer and the second type doped layer, wherein the first type doped layer, the active layer and the second type doped layer are penetrated by a plurality of recesses. The contact layer is disposed on the second type doped layer. The dielectric reflective layer is disposed on the contact layer and extended into the recesses to connect the contact layer and the first type doped layer with a coverage rate equal to or less than 60% from a top view of the LED structure.
    Type: Application
    Filed: August 1, 2018
    Publication date: November 29, 2018
    Inventors: Cheng-Kuang Yang, Hui-Ching Feng, Chien-Pin Hsu, Kuo-Hui Yu, Shyi-Ming Pan
  • Patent number: 10074777
    Abstract: A light emitting diode (LED) structure including a stacked semiconductor layer, a contact layer and a dielectric reflective layer is provided. The stacked semiconductor layer includes a first type doped layer, a second type doped layer and an active layer disposed between the first type doped layer and the second type doped layer, wherein the first type doped layer, the active layer and the second type doped layer are penetrated by a plurality of recesses. The contact layer is disposed on the second type doped layer. The dielectric reflective layer is disposed on the contact layer and extended into the recesses to connect the contact layer and the first type doped layer with a coverage rate equal to or less than 60% from a top view of the LED structure.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: September 11, 2018
    Assignee: Epistar Corporation
    Inventors: Cheng-Kuang Yang, Hui-Ching Feng, Chien-Pin Hsu, Kuo-Hui Yu, Shyi-Ming Pan
  • Publication number: 20160064617
    Abstract: A light emitting diode (LED) structure including a stacked semiconductor layer, a contact layer and a dielectric reflective layer is provided. The stacked semiconductor layer includes a first type doped layer, a second type doped layer and an active layer disposed between the first type doped layer and the second type doped layer, wherein the first type doped layer, the active layer and the second type doped layer are penetrated by a plurality of recesses. The contact layer is disposed on the second type doped layer. The dielectric reflective layer is disposed on the contact layer and extended into the recesses to connect the contact layer and the first type doped layer with a coverage rate equal to or less than 60% from a top view of the LED structure.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 3, 2016
    Inventors: Cheng-Kuang Yang, Hui-Ching Feng, Chien-Pin Hsu, Kuo-Hui Yu, Shyi-Ming Pan
  • Patent number: 8933469
    Abstract: The present invention relates to a high-voltage light-emitting device suitable for light-emitting diode chip array module. The device comprises a set of light emitting diode chips, about 18˜25 chips, deposited on a substrate by using a non-matrix arrangement. Through the adjustments, the high-voltage light-emitting device of the present invention has optimized luminous efficiency.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: January 13, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Hui-Ching Feng, Chen-Hong Lee, Wei-Kang Cheng, Shyi-Ming Pan
  • Patent number: 8314432
    Abstract: The present invention is related to a light emitting device with an insulating layer, which comprises a transparent substrate, a first light emitting unit, a second light emitting unit, an insulating layer and a conducting layer. The first light emitting unit and the second light emitting unit are set up on the transparent substrate, wherein the second light emitting unit has an appearance of a stair structure. The insulating layer is set between the first and the second light emitting units. The conducting layer is on the insulating layer in order to conduct the first and the second light emitting units. Because of the appearance of the stair structure of the second light emitting unit, improving the cladding efficiency of the insulating layer, further improving the insulating efficiency of the insulating layer and avoiding the insulating layer loosing and the leakage between the first and the second light emitting units.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: November 20, 2012
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Hui Ching Feng, Kuo-Chin Huang, Shyi-Ming Pan, Hung-Li Pan, Yin-Cheng Chu
  • Patent number: 7956365
    Abstract: An alternating current (AC) light emitting device is revealed. The AC light emitting device includes a substrate and a plurality of light emitting units arranged on the substrate. The light emitting unit consists of a first semiconductor layer, a light emitting layer, a second semiconductor layer, at least one electrode and at least one second electrode respectively arranged on the first semiconductor layer and the second semiconductor layer from bottom to top. The plurality of light emitting units is coupled to at least one adjacent light emitting unit by a plurality of conductors. By the plurality of conductors that connect light emitting units with at least one adjacent light emitting unit, an open circuit will not occur in the AC light emitting device once one of the conductors is broken.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: June 7, 2011
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Hui Ching Feng, Kuo-Chin Huang, Shyi-Ming Pan, Hung-Li Pan
  • Publication number: 20100052494
    Abstract: An alternating current (AC) light emitting device is revealed. The AC light emitting device includes a substrate and a plurality of light emitting units arranged on the substrate. The light emitting unit consists of a first semiconductor layer, a light emitting layer, a second semiconductor layer, at least one electrode and at least one second electrode respectively arranged on the first semiconductor layer and the second semiconductor layer from bottom to top. The plurality of light emitting units is coupled to at least one adjacent light emitting unit by a plurality of conductors. By the plurality of conductors that connect light emitting units with at least one adjacent light emitting unit, an open circuit will not occur in the AC light emitting device once one of the conductors is broken.
    Type: Application
    Filed: December 8, 2008
    Publication date: March 4, 2010
    Inventors: Hui Ching FENG, Kuo-Chin Huang, Shyi-Ming Pan, Hung-Li Pan
  • Publication number: 20100032690
    Abstract: The present invention is related to a light emitting device with an insulating layer, which comprises a transparent substrate, a first light emitting unit, a second light emitting unit, an insulating layer and a conducting layer. The first light emitting unit and the second light emitting unit are set up on the transparent substrate, wherein the second light emitting unit has an appearance of a stair structure. The insulating layer is set between the first and the second light emitting units. The conducting layer is on the insulating layer in order to conduct the first and the second light emitting units. Because of the appearance of the stair structure of the second light emitting unit, improving the cladding efficiency of the insulating layer, further improving the insulating efficiency of the insulating layer and avoiding the insulating layer loosing and the leakage between the first and the second light emitting units.
    Type: Application
    Filed: January 6, 2009
    Publication date: February 11, 2010
    Inventors: Hui Ching Feng, Kuo-Chin Huang, Shyi-Ming Pan, Hung-Li Pan, Yin-Cheng Chu
  • Patent number: 7462868
    Abstract: An LED chip with double close-loop electrode design includes a substrate, a first-type doped semiconductor layer, a light emitting layer, a second-type doped semiconductor layer, a first electrode and a second electrode. The first-type doped semiconductor layer is disposed on the substrate, the light emitting layer is disposed on the first-type doped semiconductor layer and the second-type doped semiconductor layer is disposed on the light emitting layer. The first electrode, disposed on the first-type doped semiconductor layer, has a close-loop pattern. The second electrode, disposed on the second-type doped semiconductor layer, is located inside a region encircled by the first electrode and has a close-loop pattern. In this way, the LED chip with double close-loop electrode design is able to avoid deteriorated luminous efficiency caused by broken electrodes.
    Type: Grant
    Filed: February 26, 2006
    Date of Patent: December 9, 2008
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Yun-Li Li, Hui-Ching Feng
  • Patent number: D745472
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: December 15, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D745473
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: December 15, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D745474
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: December 15, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D745475
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: December 15, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D754619
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: April 26, 2016
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D755135
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: May 3, 2016
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D757663
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: May 31, 2016
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng
  • Patent number: D760178
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 28, 2016
    Assignee: Formosa Epitaxy Incorporation
    Inventor: Hui-Ching Feng