Abstract: An electrode structure of rechargeable battery includes a battery tab stack, an electrode lead, a welding protective layer and a welding seam. The battery tab stack is formed by extension of a plurality of electrode sheets. The electrode lead is joined to one side of the battery tab stack. The welding protective layer is joined to another side of the battery tab stack opposite to the electrode lead. The welding seam extends from the welding protective layer to the electrode lead through the battery tab stack.

Abstract: A transistor structure includes a substrate, a source electrode, a drain electrode, a protective layer and a gate electrode. The source electrode and the drain electrode are provided on the substrate. The protective layer is provided on the substrate. The protective layer is provided between the source electrode and the drain electrode. The protective layer includes a SiNx layer and a SiOx layer. The SiOx layer is provided on the substrate, the SiNx layer is provided on the SiOx layer, and a through hole of the protective layer is formed to extend through the SiNx layer and the SiOx layer. The gate electrode is provided in the through hole, and the gate electrode is separated from at least part of the SiOx layer so as to form an air gap therebetween.

Abstract: A semiconductor structure includes a first transistor, a second transistor, a first dummy source/drain, a third transistor, a fourth transistor, and a second dummy source/drain. The first transistor and a second transistor adjacent to the first transistor are at a first elevation. The first dummy source/drain is disposed at the first elevation. The third transistor and a fourth transistor adjacent to the third transistor, are at a second elevation different from the first elevation. The second dummy source/drain is disposed at the second elevation. The second transistor is vertically aligned with the third transistor. The first dummy source/drain is vertically aligned with a source/drain of the fourth transistor. The second dummy source/drain is vertically aligned with a source/drain of the first transistor. The gate structure between the second dummy source/drain and a source/drain of the third transistor is absent. A method for manufacturing a semiconductor structure is also provided.

Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: A semiconductor device includes one or more active semiconductor components, wherein a front side is defined over the semiconductor substrate and a back side is defined beneath the semiconductor substrate. A front side power rail is formed at the front side of the semiconductor device and is configured to receive a first reference power voltage. First and second back side power rails are formed on the back side of the semiconductor substrate and are configured to receive corresponding second and third reference power voltages. The first, second and third reference power voltages are different from each other.

Abstract: A semiconductor device, includes a first metal layer, a second metal layer, a drain/source contact and at least one conductive via. The first metal layer has a first conductor that extends in a first direction and a second conductor that extends in the first direction, wherein the second conductor is directly adjacent to the first conductor. The second metal layer has a third conductor that extends in a second direction, wherein the second direction is transverse to the first direction. The drain/source contact extends in the second direction and is connected to the second conductor. The at least one conductive via connects the first conductor and the second conductor through the third conductor.

Abstract: A touch control method is provided. The touch control method is applied in a touch device including a plurality of touch electrodes, the touch control method includes: step S1, sending a scanning signal to the plurality of touch electrodes, the scanning signal being a multi-frequency scanning signal; step S2, acquiring touch data according to the multi-frequency scanning signal; and step S3, calculating a current touch position according to the touch data.

Abstract: A hybrid random access memory for a system-on-chip (SOC), including a semiconductor substrate with a MRAM region and a ReRAM region, a first dielectric layer on the semiconductor substrate, multiple ReRAM cells in the first dielectric layer on the ReRAM region, a second dielectric layer above the first dielectric layer, and multiple MRAM cells in the second dielectric layer on the MRAM region.

Abstract: The present disclosure provides a packing method including following steps. Genetic algorithm is utilized to calculate multiple packing programs. Multiple candidate packing programs including all items are selected from the packing programs. Among each of the candidate packing programs, at least one of the items to be placed earlier is classified into a first subset, and at least another one of the items to be placed later is classified into a second subset. Among each of the candidate packing programs, a first packing for the first subset is maintained, and a second packing for the second subset is recalculated by using a greedy algorithm to generate an updated second packing.

Abstract: The present disclosure discloses an image processing apparatus having lens color-shading correction mechanism. A first and a second calibration circuits perform lens color-shading correction on an input image according to a first and a second calibration parameters to generate a first and a second calibrated images. A first and a second statistic circuits perform statistic on the first and the second calibrated images to generate a first and a second statistic results.

Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: An interactive augmented reality image capturing system, and the system includes a management module, an operation module, a display module, and an image capturing module. The management module includes a control unit and a storage unit. The storage unit stores a virtual scenario and a virtual object. The operation module is adapted to retrieve the virtual scenario and the virtual object. The image capturing module includes a sensing unit. The video recording unit captures a dynamic image of a user. The sensing unit detects three-dimensional information of the user and transmits the three-dimensional dynamic information to the management module. The management module receives the three-dimensional dynamic information and applies the virtual scenario and the virtual object on the dynamic image to generate a dynamic virtual image. The management module requests the display module to display the dynamic virtual image. The management module further stores the dynamic virtual image.

Abstract: An interactive camera system with virtual reality technology is provided. The system includes an augmented reality module, an accessory database, a voice database, and an integration module. The augmented reality module generates a virtual environment, and a user can combine a three-dimensional avatar substrate with a character image to form a three-dimensional avatar that displayed in the virtual environment. The accessory database and the voice database allow the user to select different accessory patterns and different voice modules for different types of three-dimensional avatar substrates. The integration module allows professional personnel to provide technical presentations, thesis introductions, or background introductions in the virtual environment, so that the presentations or the introductions can be performed with three-dimensional augmented reality effect.

Abstract: A label location system with virtual reality technology is provided. The system includes an augmented reality module, a location-based service module, a message storage module, and a message reading module. The augmented reality module is for scanning a specific object to generate a virtual scenario corresponding to the specific object. The location-based service module is coupled to the AR module for confirming a location of the specific object. The message storage module is coupled to the augmented reality module for storing a message generated by an electronic device. The message is generated in correspondence to the generation of the virtual scenario, and a message label corresponding to the message is generated at the location of the specific object. The message reading module adapted to be coupled to the message storage module to trigger the message label so as to read the message.

Abstract: A shopping system with virtual reality technology is run in an portable device. The shopping system has a virtual space generator, an augmented reality (AR) module, a positioning module, and a shopping module. The AR module is used to generate an AR image that would be imported to the virtual space generator. The positioning module is used to obtain a position and orientation of the portable device and import the position and orientation to the virtual space generator to change a movement position of a view point in the virtual space. Cooperating with a commodity service unit and a shopping guiding module, the 3D product content in the commodity service unit can be imported the virtual space. Then, the detail of the commodity can be obtained in the virtual space, and the commodity can be matched with the background. A custom can place the order via the shopping guiding module.

Abstract: An interactive camera system with virtual reality technology is provided. The system includes an augmented reality module, an accessory database, a voice database, and an integration module. The augmented reality module generates a virtual environment, and a user can combine a three-dimensional avatar substrate with a character image to form a three-dimensional avatar that displayed in the virtual environment. The accessory database and the voice database allow the user to select different accessory patterns and different voice modules for different types of three-dimensional avatar substrates. The integration module allows professional personnel to provide technical presentations, thesis introductions, or background introductions in the virtual environment, so that the presentations or the introductions can be performed with three-dimensional augmented reality effect.