Patents by Inventor Hui Joong KIM
Hui Joong KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240116184Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a residType: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Min Sung HA, Kwang-Jun KIM, Jong Kyu KIM, Hyun-Joong KIM, Jin Ho SO, Chi-Gun AN, Ki Moon LEE, Hui Gwan LEE, Beom Soo HWANG
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Patent number: 11646285Abstract: Provided is a semiconductor package including a first bump pad on a first substrate, a second bump pad on a second substrate, a core material for reverse reflow between the first bump pad and the second bump pad, and a solder member forming a solder layer on the core material for reverse reflow. The solder member is in contact with the first bump pad and the second bump pad. Each of a first diameter of the first bump pad and a second diameter of the second bump pad is at least about 1.1 times greater than a third diameter of the core material for reverse reflow. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.Type: GrantFiled: May 18, 2021Date of Patent: May 9, 2023Assignee: MK ELECTRON CO., LTD.Inventors: Jae Yeol Son, Jeong Tak Moon, Jae Hun Song, Young Woo Lee, Seul Gi Lee, Min Su Park, Hui Joong Kim
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Publication number: 20230111798Abstract: A lead-free solder alloy includes bismuth (Bi), content of which is equal to or greater than 56 wt % and equal to or less than 57.5 wt %, indium (In), content of which is equal to or greater than 0.05 wt % and equal to or less than 1.0 wt %, and the balance of tin (Sn) and another unavoidable impurity. The lead-free solder alloy of the disclosure may enable bonding with improved ductility and thermal shock reliability while not having a large melting point change compared to an Sn-58Bi alloy.Type: ApplicationFiled: October 4, 2022Publication date: April 13, 2023Applicant: MK ELECTRON CO., LTD.Inventors: Young Woo LEE, Seul Gi LEE, Hui Joong KIM, Jae Yool SON, Jae Hun SONG, Jeong Tak MOON
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Publication number: 20220212293Abstract: A lead (Pb)-free, and silver (Ag)-free solder alloy includes a primary metallic element in a content of about 1.1 wt % to about 1.9 wt %, nickel(Ni) in a content of about 0.02 wt % to about 0.09 wt %, copper (Cu) in a content of about 0.2 wt % to about 0.9 wt %, and tin (Sn) and other unavoidable impurities in remaining balance, wherein the primary metallic element is at least one selected from the group including bismuth (Bi), chromium (Cr), indium (In), antimony (Sb), silicon (Si) and zinc (Zn).Type: ApplicationFiled: December 22, 2021Publication date: July 7, 2022Applicant: MK ELECTRON CO., LTD.Inventors: Jae Yeol SON, Jeong Tak MOON, Jae Hun SONG, Young Woo LEE, Seul Gi LEE, Min Su PARK, Hui Joong KIM
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Publication number: 20210375811Abstract: A semiconductor package of a pin-grid-array type includes a bump pad on a first substrate, a metal socket on a second substrate, a core material for reverse reflow on the bump pad, and solder paste or a solder bump forming a solder layer on the core material for reverse reflow. The solder paste or the solder bump is in contact with the bump pad. The core material for reverse reflow and the solder paste or the solder bump bonded to the core material for reverse reflow are used as a pin and detachably attached to the metal socket. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.Type: ApplicationFiled: May 18, 2021Publication date: December 2, 2021Applicant: MK ELECTRON CO., LTD.Inventors: Jae Yeol SON, Jeong Tak Moon, Jae Hun Song, Young Woo Lee, Seul Gi Lee, Min Su Park, Hui Joong Kim
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Publication number: 20210366858Abstract: Provided is a semiconductor package including a first bump pad on a first substrate, a second bump pad on a second substrate, a core material for reverse reflow between the first bump pad and the second bump pad, and a solder member forming a solder layer on the core material for reverse reflow. The solder member is in contact with the first bump pad and the second bump pad. Each of a first diameter of the first bump pad and a second diameter of the second bump pad is at least about 1.1 times greater than a third diameter of the core material for reverse reflow. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.Type: ApplicationFiled: May 18, 2021Publication date: November 25, 2021Applicant: MK ELECTRON CO., LTD.Inventors: Jae Yeol SON, Jeong Tak MOON, Jae Hun SONG, Young Woo LEE, Seul Gi LEE, Min Su PARK, Hui Joong KIM
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Publication number: 20160315040Abstract: Provided are a reverse-reflow core, a semiconductor package, and a method of fabricating a semiconductor package. The semiconductor package includes: a semiconductor apparatus including a bump pad; and a bump portion bonded to the bump pad. The bump portion includes: a core; an intermetallic compound layer formed on the core; and a solder layer coating the intermetallic compound layer, wherein the thickness of a portion of the solder layer decreases as the distance between the portion of the solder layer and the bump pad increases. The reverse-reflow core, the semiconductor package, and the method of fabricating a semiconductor package enable the fabrication of a semiconductor package having high bonding strength and a high degree of precision.Type: ApplicationFiled: April 21, 2016Publication date: October 27, 2016Inventors: Jae Yeol SON, Jeong Tak MOON, Jae Hun SONG, Young Woo LEE, Eung Jae KIM, Su-Yong RYU, Hui Joong KIM, Ho Gun CHA, Ik Joo MAENG, Chan Goo YOO
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Publication number: 20160256962Abstract: A solder ball includes about 1.0 wt % to about 2.0 wt % silver (Ag), about 4.0 wt % to about 8.0 wt % indium (In), about 10.0 wt % to about 20.0 wt % bismuth (Bi), about 0.005 wt % to about 0.1 wt % deoxidizer, and the balance of tin (Sn). A melting point of the solder is about 170° C. to about 190° C.Type: ApplicationFiled: February 16, 2016Publication date: September 8, 2016Applicant: MK Electron Co., Ltd.Inventors: Hui Joong KIM, Jae Hun SONG, Young Woo LEE, Jae Hong LEE, Jae Yeol SON, Eung Jae KIM, Ho Gun CHA
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Patent number: 9391039Abstract: A solder ball and a semiconductor device using the same are provided. In a Sn-based solder ball in which a first plating layer and a second plating layer are sequentially formed on a core ball, the second plating layer includes a Sn—Ag—Cu alloy, and Ag3Sn intermetallic compound (IMC) nanoparticles or Ag—Sn compound nanoparticles exist in the second plating layer. The solder balls have high sphericity and stand-off characteristics and connection reliability so that a semiconductor device having a high degree of integration may be implemented.Type: GrantFiled: July 30, 2014Date of Patent: July 12, 2016Assignee: MK Electron Co., Ltd.Inventors: Jeong Tak Moon, Jae Yeol Son, Santosh Kumar, Eung Jae Kim, Hui Joong Kim, Ho Gun Cha
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Publication number: 20150380373Abstract: A solder ball and a semiconductor device using the same are provided. In a Sn-based solder ball in which a first plating layer and a second plating layer are sequentially formed on a core ball, the second plating layer includes a Sn—Ag—Cu alloy, and Ag3Sn intermetallic compound (IMC) nanoparticles or Ag—Sn compound nanoparticles exist in the second plating layer. The solder balls have high sphericity and stand-off characteristics and connection reliability so that a semiconductor device having a high degree of integration may be implemented.Type: ApplicationFiled: July 30, 2014Publication date: December 31, 2015Inventors: Jeong Tak MOON, Jae Yeol SON, Santosh KUMAR, Eung Jae KIM, Hui Joong KIM, Ho Gun CHA
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Patent number: 9156111Abstract: Provided are a lead-free solder, a solder paste, and a semiconductor device, and more particularly, a lead-free solder that includes Cu in a range from about 0.1 wt % to about 0.8 wt %, Pd in a range from about 0.001 wt % to about 0.1 wt %, Al in a range from about 0.001 wt % to about 0.1 wt %, Si in a range from about 0.001 wt % to about 0.1 wt %, and Sn and inevitable impurities as remainder, a solder paste and a semiconductor device including the lead-free solder. The lead-free solder and the solder paste are environment-friendly and have a high high-temperature stability and high reliability.Type: GrantFiled: December 2, 2014Date of Patent: October 13, 2015Assignees: MK ELECTRON CO., LTD., HOSEO UNIVERSITY ACADEMIC COOPERATION FOUNDATION, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY, KOREA ELECTRONICS TECHNOLOGY INSTITUTEInventors: Sung Jae Hong, Keun Soo Kim, Chang Woo Lee, Jung Hwan Bang, Yong Ho Ko, Hyuck Mo Lee, Jae Won Chang, Ja Hyun Koo, Jeong Tak Moon, Young Woo Lee, Won Sik Hong, Hui Joong Kim, Jae Hong Lee
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Publication number: 20150151386Abstract: Provided are a lead-free solder, a solder paste, and a semiconductor device, and more particularly, a lead-free solder that includes Cu in a range from about 0.1 wt % to about 0.8 wt %, Pd in a range from about 0.001 wt % to about 0.1 wt %, Al in a range from about 0.001 wt % to about 0.1 wt %, Si in a range from about 0.001 wt % to about 0.1 wt %, and Sn and inevitable impurities as remainder, a solder paste and a semiconductor device including the lead-free solder. The lead-free solder and the solder paste are environment-friendly and have a high high-temperature stability and high reliability.Type: ApplicationFiled: December 2, 2014Publication date: June 4, 2015Applicants: MK ELECTRON CO., LTD., HOSEO UNIVERSITY ACADEMIC COOPERATION FOUNDATION, KOREA ELECTRONICS TECHNOLOGY INSTITUTE, KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Sung Jae HONG, Keun Soo KIM, Chang Woo LEE, Jung Hwan BANG, Yong Ho KO, Hyuck Mo LEE, Jae Won CHANG, Ja Hyun KOO, Jeong Tak MOON, Young Woo LEE, Won Sik HONG, Hui Joong KIM, Jae Hong LEE