Patents by Inventor Hui-Jung Wu

Hui-Jung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250087498
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by patterning a tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry, and using patterned photoresist as a mask, thereby providing a substrate having a plurality of protruding tin oxide features (mandrels). Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrels. Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning underlying layers on the substrate.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Jengyi Yu, Samantha S.H. Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Patent number: 12183589
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by patterning a tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry, and using patterned photoresist as a mask, thereby providing a substrate having a plurality of protruding tin oxide features (mandrels). Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrels. Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning underlying layers on the substrate.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: December 31, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Publication number: 20240387258
    Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Hui-Jung Wu, Bart J. Van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
  • Patent number: 12142868
    Abstract: The present invention relates to a chip-fixing device for a socket, which comprises a fixing base body and a movable stop. The socket is assembled in a socket-accommodating recess of the fixing base body. The movable stop is assembled in the fixing base body and controlled in such a manner that a stopper is moved between a first position and a second position, wherein the first position refers to a position where the stopper is located right above the socket, and the second position refers to a position where the stopper is not located right above the socket. Accordingly, the socket-accommodating recess can be used to install sockets of different sizes, and the movable stop can drive the stopper to restrict a chip from falling off the socket or drive the stopper to release the chip, depending on presence or absence of an external force.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: November 12, 2024
    Assignee: CHROMA ATE INC.
    Inventors: Hui-Jung Wu, Tsung-I Lin, Shou-Sheng Hsu
  • Patent number: 12094711
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively with an etch selectivity of at least 10 in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon (e.g., at a hydrogen/hydrocarbon ratio of at least 5), such that a carbon-containing polymer is formed on the substrate. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: September 17, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Patent number: 12080592
    Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: September 3, 2024
    Assignee: Lam Research Corporation
    Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
  • Publication number: 20240263301
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Application
    Filed: April 12, 2024
    Publication date: August 8, 2024
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Pravin Mahorowala
  • Patent number: 11987876
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: May 21, 2024
    Assignee: Lam Research Corporation
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Mahorowala
  • Patent number: 11792987
    Abstract: A three-dimensional (3D) memory structure includes memory cells and a plurality of oxide layers and a plurality of word line layers. The plurality of oxide layers and the plurality of word line layers are alternately stacked in a first direction. A plurality of double channel holes extend through the plurality of oxide layers and the plurality of word line layers in the first direction. The plurality of double channel holes have a peanut-shaped cross-section in a second direction that is transverse to the first direction.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: October 17, 2023
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Thorsten Lill, Meihua Shen, John Hoang, Hui-Jung Wu, Gereng Gunawan, Yang Pan
  • Publication number: 20230143057
    Abstract: Channel material is conformally deposited along sidewalls of one or more etched features of a mold stack in fabricating a three-terminal memory device. The channel material is deposited in recessed regions and non-recessed regions of the one or more etched features. A sacrificial liner is deposited on the channel material. A directional etch removes the sacrificial liner from non-recessed regions of the one or more etched features. An isotropic etch removes the channel material from non-recessed regions of the one or more etched features, leaving the channel material and the sacrificial liner intact in the recessed regions. The sacrificial liner is removed, leaving the channel material intact and isolated with minimal loss of channel material from over-etch.
    Type: Application
    Filed: March 1, 2021
    Publication date: May 11, 2023
    Inventors: John HOANG, Meihua SHEN, Thorsten Bernd LILL, Hui-Jung WU, Aaron Lynn ROUTZAHN, Francis Sloan ROBERTS
  • Patent number: 11630147
    Abstract: The present invention relates to a low-thermal resistance pressing device for a socket, which mainly comprises a housing, an inner collar, a heat conductive pressing block, a bearing collar and a locking member. The locking member on the housing is used to lock the socket. The inner collar is threadedly engaged with the housing. The bearing collar is located between the inner collar and the heat conductive pressing block. In the case of rotating the inner collar in the housing, the bearing collar drives the heat conductive pressing block to move axially so as to exert an axial force to a device to be tested. Because the heat conductive pressing block protrudes from the upper and lower surfaces of the housing, one end thereof can be in contact with a temperature control module, and the other end thereof can be in contact with the device to be tested.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: April 18, 2023
    Assignee: CHROMA ATE INC.
    Inventors: Ming Cheng Huang, Tsung-I Lin, Hui-Jung Wu, Chien-Ming Chen
  • Publication number: 20220270877
    Abstract: A method of processing a substrate includes: providing a substrate having one or more mandrels comprising a mandrel material, wherein a layer of a spacer material coats horizontal surfaces and sidewalls of the one or more mandrels; and etching and completely removing the layer of the spacer material from the horizontal surfaces of the one or more mandrels and thereby exposing the mandrel material, without completely removing the spacer material residing at the sidewalls of the one or more mandrels. The etching includes exposing the substrate to a plasma formed using a mixture comprising a first gas and a polymer-forming gas, and wherein the etching comprises forming a polymer on the substrate. Polymer-forming gas may include carbon (C) and hydrogen (H).
    Type: Application
    Filed: February 10, 2022
    Publication date: August 25, 2022
    Inventors: Jengyi Yu, Samantha S.H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Publication number: 20220206059
    Abstract: The present invention relates to a low-thermal resistance pressing device for a socket, which mainly comprises a housing, an inner collar, a heat conductive pressing block, a bearing collar and a locking member. The locking member on the housing is used to lock the socket. The inner collar is threadedly engaged with the housing. The bearing collar is located between the inner collar and the heat conductive pressing block. In the case of rotating the inner collar in the housing, the bearing collar drives the heat conductive pressing block to move axially so as to exert an axial force to a device to be tested. Because the heat conductive pressing block protrudes from the upper and lower surfaces of the housing, one end thereof can be in contact with a temperature control module, and the other end thereof can be in contact with the device to be tested.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 30, 2022
    Inventors: Ming Cheng HUANG, Tsung-I LIN, Hui-Jung WU, Chien-Ming CHEN
  • Publication number: 20220200185
    Abstract: The present invention relates to a chip-fixing device for a socket, which comprises a fixing base body and a movable stop. The socket is assembled in a socket-accommodating recess of the fixing base body. The movable stop is assembled in the fixing base body and controlled in such a manner that a stopper is moved between a first position and a second position, wherein the first position refers to a position where the stopper is located right above the socket, and the second position refers to a position where the stopper is not located right above the socket. Accordingly, the socket-accommodating recess can be used to install sockets of different sizes, and the movable stop can drive the stopper to restrict a chip from falling off the socket or drive the stopper to release the chip, depending on presence or absence of an external force.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 23, 2022
    Inventors: HUI-JUNG WU, TSUNG-I LIN, SHOU-SHENG HSU
  • Patent number: 11355353
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by providing a substrate having a plurality of protruding tin oxide features (mandrels) residing on an exposed etch stop layer. Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90% of initial height at the sidewall). Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning the etch stop layer and underlying layers.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 7, 2022
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha SiamHwa Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Publication number: 20220165571
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively with an etch selectivity of at least 10 in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon (e.g., at a hydrogen/hydrocarbon ratio of at least 5), such that a carbon-containing polymer is formed on the substrate. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
    Type: Application
    Filed: February 10, 2022
    Publication date: May 26, 2022
    Inventors: Jengyi Yu, Samantha S.H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Patent number: 11322351
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon. The hydrocarbon significantly improves the etch selectivity. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: May 3, 2022
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Publication number: 20220051938
    Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.
    Type: Application
    Filed: September 10, 2019
    Publication date: February 17, 2022
    Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
  • Publication number: 20210391355
    Abstract: A three-dimensional (3D) memory structure includes memory cells and a plurality of oxide layers and a plurality of word line layers. The plurality of oxide layers and the plurality of word line layers are alternately stacked in a first direction. A plurality of double channel holes extend through the plurality of oxide layers and the plurality of word line layers in the first direction. The plurality of double channel holes have a peanut-shaped cross-section in a second direction that is transverse to the first direction.
    Type: Application
    Filed: October 22, 2019
    Publication date: December 16, 2021
    Inventors: Thorsten LILL, Meihua SHEN, John HOANG, Hui-Jung WU, Gereng GUNAWAN, Yang PAN
  • Publication number: 20210265173
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by patterning a tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry, and using patterned photoresist as a mask, thereby providing a substrate having a plurality of protruding tin oxide features (mandrels). Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrels. Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning underlying layers on the substrate.
    Type: Application
    Filed: May 13, 2021
    Publication date: August 26, 2021
    Inventors: Jengyi Yu, Samantha S.H. Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu