Abstract: A method for seamless gap filling is provided, including providing a semiconductor structure with a device layer having a gap therein, wherein the gap has an aspect ratio greater than 4. A liner layer is formed over the device layer exposed by the gap. A first un-doped oxide layer is formed over the liner layer in the gap. A doped oxide layer is formed over the first undoped oxide layer in the gap. A second un-doped oxide layer is formed over the doped oxide layer in the gap to fill the gap. An annealing process is performed on the second un-doped oxide layer, the doped oxide layer, and the first un-doped oxide to form a seamless oxide layer in the gap, wherein the seamless oxide layer has an interior doped region.

Abstract: A capacitor structure includes: a top electrode, a bottom electrode, a first capacitor dielectric layer positioned between the top electrode and the bottom electrode and a second capacitor dielectric layer positioned between the top electrode and the bottom electrode. The first capacitor dielectric layer is selected from the group consisting HfO2, ZrO2, and TiO2. The second capacitor dielectric layer is selected from the group consisting of lanthanide oxide series and rare earth oxide series.

Abstract: A transistor device includes a semiconductor substrate, a source doping region and a drain doping region in the semiconductor, a channel region between the source doping region and the drain doping region, a gate stack on the channel region, wherein the gate stack includes an amorphous interfacial layer, a crystalline metal oxide gate dielectric layer and a gate conductor.