Abstract: A computer chipset having reduced peripheral pins for accessing a conventional ROM in a computer system is disclosed. There is a switching circuit within the chipset. When the computer is turned on, a booting control circuit activates a booting enabling signal, so that booting programs can be accessed from the ROM through the switching circuit and are executed in a main processor. Subsequently, contents stored in the ROM are moved to a main memory and the booting enabling signal is inactivated by the booting control circuit to allow a peripheral control circuit to communicate with peripheral devices. In this way, chipset having a low pin count (LPC) interface circuit can share the peripheral pins of the chipset to access the conventional ROMs, so that the production costs can be reduced.