Patents by Inventor Hui Ru Tan

Hui Ru Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763348
    Abstract: The invention provides a product and a manufacturing process for a high power semiconductor device. The semiconductor device comprises a GaN/AlGaN epilayer structure on an SOI substrate with a thick, uninterrupted GaN layer for use in high-power applications.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: September 1, 2020
    Assignee: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Publication number: 20200105915
    Abstract: The invention provides a product and a manufacturing process for a high power semiconductor device. The semiconductor device comprises a GaN/AlGaN epilayer structure on an SOI substrate with a thick, uninterrupted GaN layer for use in high-power applications.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Applicant: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Patent number: 10546949
    Abstract: Contemplated is a semiconductor device comprising: a substrate; a group (III)-nitride layer; a metal-group (III)-nitride layer deposited between the substrate and group (III)-nitride layer; and a metal-nitride layer deposited between the substrate and the metal-group (III)-nitride layer. Also a method for making a semiconductor device with the above mentioned structure is contemplated. Furthermore, the substrate can be a silicon on insulator (SOI) substrate; the metal-nitride layer can be an aluminium nitride layer; the metal-group (III)-nitride layer can be an aluminium gallium nitride layer; and the group (III)-nitride layer can be a gallium nitride layer.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: January 28, 2020
    Assignee: Agency for Science, Technology and Research
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmanan, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy
  • Publication number: 20150357451
    Abstract: Contemplated is a semiconductor device comprising: a substrate; a group (III)-nitride layer; a metal-group (III)-nitride layer deposited between the substrate and group (III)-nitride layer; and a metal-nitride layer deposited between the substrate and the metal-group (III)-nitride layer. Also a method for making a semiconductor device with the above mentioned structure is contemplated. Furthermore, the substrate can be a silicon on insulator (SOI) substrate; the metal-nitride layer can be an aluminium nitride layer; the metal-group (III)-nitride layer can be an aluminium gallium nitride layer; and the group (III)-nitride layer can be a gallium nitride layer.
    Type: Application
    Filed: December 23, 2013
    Publication date: December 10, 2015
    Inventors: Krishna Kumar Manippady, Surani Bin Dolmananh, Kaixin Vivian Lin, Hui Ru Tan, Sudhiranjan Tripathy