Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

Abstract: A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. A spacer separates the leadframe assemblies from one another. A single mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the spacer. A portion of the leads of both leadframe assemblies are uncovered by the mold compound to form terminals of the semiconductor package. A side of both die pads is uncovered by the mold compound.

Abstract: An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating

Abstract: An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating

Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap.

Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap.