Abstract: An integrated circuit includes a semiconductor substrate, an isolation region extending into, and overlying a bulk portion of, the semiconductor substrate, a buried conductive track comprising a portion in the isolation region, and a transistor having a source/drain region and a gate electrode. The source/drain region or the gate electrode is connected to the buried conductive track.

Abstract: An integrated circuit includes a semiconductor substrate, an isolation region extending into, and overlying a bulk portion of, the semiconductor substrate, a buried conductive track comprising a portion in the isolation region, and a transistor having a source/drain region and a gate electrode. The source/drain region or the gate electrode is connected to the buried conductive track.

Abstract: A layout method includes generating a design data comprising an electronic circuit, and generating a design layout by placing a first cell corresponding to the electronic circuit. The first cell includes a first source/drain region and a second source/drain region extending in a first direction in a first layer, a gate electrode extending in a second direction perpendicular to the first direction in a second layer, and a first conductive line arranged in a third layer over the second layer and electrically connected to one of the first source/drain region, the second source/drain region and the gate electrode. The first cell is defined by a left cell side and a right cell side. At least one of the left cell side, the right cell side, the gate electrode and the first conductive line extends in a third direction not parallel to the first and second directions.

Abstract: The present disclosure provides a motor drive integrated on-board charger to reduce the quantity of components in an electric system of an electric vehicle. Reduction of components is achieved by utilizing the motor and the motor driving inverter as a part of the on-board charger in the charging mode. By controlling relays, electrical connections of the system may be reconfigured according to its mode of operation. In one aspect, the motor and the motor driving inverter play the roles of a boost PFC, a current regulator, or both.

Abstract: A layout method includes generating a design data comprising an electronic circuit, and generating a design layout by placing a first cell corresponding to the electronic circuit. The first cell includes a first source/drain region and a second source/drain region extending in a first direction in a first layer, a gate electrode extending in a second direction perpendicular to the first direction in a second layer, and a first conductive line arranged in a third layer over the second layer and electrically connected to one of the first source/drain region, the second source/drain region and the gate electrode. The first cell is defined by a left cell side and a right cell side. At least one of the left cell side, the right cell side, the gate electrode and the first conductive line extends in a third direction not parallel to the first and second directions.

Abstract: A semiconductor wafer is transported by a mechanical system into or out of a quartz housing filled with a protection gas. The wafer is placed between and spaced apart from two graphite plates. A RF induction coil surrounding the quartz housing is used to heat the graphite plates. Radiation from the heated graphite plates heats the wafer from room temperature to an elevated desired temperature. During the time period when a wafer absorbs radiation primarily through electron-to-electron transition, heat convection and conduction by the protection gas conveys heat from the graphite plates to the wafer to accelerate the heating of the wafer and reduces temperature nonuniformity of the wafer.