Patents by Inventor Hui Ye

Hui Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128163
    Abstract: Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of the first and second surface-mount capacitors.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Hong Wan Ng, Chin Hui Chong, Hem P. Takiar, Seng Kim Ye, Kelvin Tan Aik Boo
  • Publication number: 20240128182
    Abstract: Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly may include a base layer, a dielectric interposer coupled to the base layer and including a first outer surface facing the base layer and an opposing second outer surface facing away from the base layer and spaced apart from the first outer surface in a direction, a first electrical-connection cut-in in the second outer surface that extends, in the direction, toward the first outer surface, and one or more first electrical connections disposed within the first electrical-connection cut-in such that at least a portion of the one or more first electrical connections does not extend, in the direction, beyond the second outer surface.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Inventors: Chin Hui CHONG, Seng Kim YE, Hong Wan NG, Kelvin Aik Boo TAN
  • Patent number: 11942460
    Abstract: Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor device is an assembly that includes a package substrate having a front side and a backside opposite the front side. A controller die with a first longitudinal footprint can be attached to the front side of the package substrate. A passive electrical component is also attached to the front side of the package substrate. A stack of semiconductor dies can be attached to the controller die and the passive electrical component. The stack of semiconductor dies has a second longitudinal footprint greater than the first longitudinal footprint in at least one dimension. The controller die and the passive electrical component are positioned at least partially within the second longitudinal footprint, thereby at least partially supporting the stack of semiconductor dies.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Hong Wan Ng, Kelvin Tan Aik Boo, Chin Hui Chong, Hem P. Takiar, Seng Kim Ye
  • Publication number: 20240096768
    Abstract: A semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads; a gate lead; one or more switching node (Lx) leads; a first die paddle; a second die paddle; and an end paddle. Each of an exposed bottom surface of the one or more Lx leads is directly connected to an exposed bottom surface of the end paddle. A longitudinal direction of an exposed bottom surface of the gate lead is perpendicular to a longitudinal direction of each of the exposed bottom surface of the one or more Lx leads. An entirely of each of the one or more Vin leads is of the full thickness.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Yan Xun Xue, Lin Chen, Long-Ching Wang, Hui Ye
  • Patent number: 11929351
    Abstract: An apparatus includes a substrate for mounting an integrated circuit. The substrate includes a primary layer including a first surface that is a first external surface of the substrate. The substrate includes an inner layer that is located below the primary layer and including a second surface. A portion of the second surface of the inner layer is exposed via an open area associated with the primary layer. The inner layer includes a first multiple of wire bond pads that are exposed via the open area associated with the primary layer.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: March 12, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kelvin Tan Aik Boo, Chin Hui Chong, Seng Kim Ye, Hong Wan Ng, Hem P. Takiar
  • Publication number: 20240071880
    Abstract: This document discloses techniques, apparatuses, and systems relating to a package substrate for a semiconductor device. A semiconductor device assembly is described that includes a packaged semiconductor device having one or more semiconductor dies coupled to a package-level substrate. The package-level substrate has a first surface at which first contact pads are disposed in a first configuration. The packaged semiconductor device is coupled with an additional package-level substrate that includes a second surface having second contact pads disposed in the first configuration and a third surface having third contact pads disposed in a second configuration different from the first configuration. The additional package-level substrate includes circuitry coupling the second contact pads the third contact pads to provide connectivity at the third contact pads. In doing so, an adaptively compatible semiconductor device may be assembled.
    Type: Application
    Filed: August 27, 2022
    Publication date: February 29, 2024
    Inventors: Seng Kim Ye, Kelvin Tan Aik Boo, Hong Wan Ng, Chin Hui Chong
  • Publication number: 20240072022
    Abstract: Semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate having an inner surface, a die stack carried by the inner surface, and a stacked capacitor device carried by the inner surface adjacent to the die stack. The die stack can include one or more semiconductor dies, each of which can be electrically coupled to the inner surface by one or more bond wires and/or solder structures. The stacked capacitor device can include a first capacitor having a lower surface attached to the inner surface of the package substrate, a interposer having a first side attached to an upper surface of the first capacitor, and a second capacitor attached to a second side of the interposer opposite the first side.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Seng Kim Ye, Kelvin Tan Aik Boo, Hong Wan Ng, Chin Hui Chong
  • Publication number: 20240071886
    Abstract: Methods, systems, and devices for multi-chip package with enhanced conductive layer adhesion are described. In some examples, a conductive layer (e.g., a conductive trace) may be formed above a substrate. An integrated circuit may be bonded to the conductive layer and an encapsulant may be deposited at least between the integrated circuit and the conductive layer. In some examples, one or more surface features or one or more recesses may be formed on or within the conductive layer and the encapsulant may adhere to the surface features or recesses.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Hong Wan Ng, Seng Kim Ye, Kelvin Aik Boo Tan, Chin Hui Chong
  • Publication number: 20240072024
    Abstract: Modular systems in packages, and associated devices, systems, and methods, are disclosed herein. In one embodiment, a system comprises a main module package and an upper module package. The main module package includes a first substrate and a first electronic device mounted on a first side of the first substrate. The upper module package includes a second substrate and one or more second electronic devices mounted on a first side of the second substrate. The second substrate includes a cavity at a second side of the second substrate opposite the first side, and the upper module package is mountable on the first side of the first substrate of the main module package such that the first electronic device is positioned within the cavity and the second substrate generally surrounds at least a portion of a perimeter of the first electronic device.
    Type: Application
    Filed: August 27, 2022
    Publication date: February 29, 2024
    Inventors: Kelvin Tan Aik Boo, Hong Wan Ng, Seng Kim Ye, Chin Hui Chong
  • Patent number: 11909042
    Abstract: A rechargeable lithium-ion battery includes a positive electrode enabling fast charging. A negative electrode has a first active material including Li4Ti5O12. A positive electrode includes a second active material including LiCoO2. The positive electrode further includes a carbon conductive agent and a binder. A weight ratio of the carbon conductive agent to the binder is in a range of about 2:3 to about 3:2.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: February 20, 2024
    Assignee: Medtronic, Inc.
    Inventors: Hui Ye, Prabhakar A. Tamirisa
  • Patent number: 11878821
    Abstract: A vibration isolation/damping satellite mount of a chopped carbon fiber reinforced thermoplastic composite material mainly includes two parts, and the two parts are connected through bolts. Considering the limitation of the molding process, the mount configuration is further optimized, and the mount structure is prepared by using the injection molding process. Furthermore, the vibration isolation/damping satellite mount of the chopped carbon fiber reinforced thermoplastic composite material prepared in the present invention can be used for large loads and complex working conditions, and the connectivity, overall strength stability, vibration isolation performance and service life of the mount all meet the design requirements.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: January 23, 2024
    Assignee: Dalian University of Technology
    Inventors: Tong Li, Fei Niu, Hui Ye, Bo Wang
  • Publication number: 20240013450
    Abstract: One or more devices, systems, methods and/or non-transitory, machine-readable mediums are described herein for specifying one or more events in an augmented reality (AR) environment relative to a real-world (RW) environment. A system can comprise a memory that stores executable components, and a processor, coupled to the memory, that executes or facilitates execution of the executable components. The executable components can comprise a visual component that analyzes captured visual content of a RW environment, an interface component that integrates the visual content of the RW environment with AR content of an AR environment overlaying the RW environment, and a design component that facilitates in-situ placement of the AR content in the AR environment based on the visual content being overlayed, wherein the AR content comprises a specification of an event to be executed in the RW environment that triggers a virtual asset in the AR environment.
    Type: Application
    Filed: July 5, 2022
    Publication date: January 11, 2024
    Inventors: Hongbo Fu, Hui Ye
  • Publication number: 20230403075
    Abstract: Embodiments of the present disclosure relate to methods, devices and apparatuses for optical communication, and a computer readable medium. An embodiment of the method comprises determining, at an optical line terminal, a channel characteristic of a channel from an optical network unit to the optical line terminal; determining, based on the channel characteristic, a preamble property for a transmission from the optical network unit to the optical line terminal, the preamble property at least partially compensating for transmission distortion caused by the channel characteristic; transmitting preamble information to the optical network unit, the preamble information being for generating a preamble having the preamble property; and receiving the preamble having the preamble property from the optical network unit. In this way, a training speed of an equalizer of the optical line terminal can be improved, and preamble overhead can be reduced.
    Type: Application
    Filed: June 5, 2023
    Publication date: December 14, 2023
    Applicant: Nokia Solutions and Networks Oy
    Inventors: Dong Xu ZHANG, Shuang YAO, Chen Hui YE
  • Publication number: 20230379196
    Abstract: Examples of the present disclosure relate to a method, device and apparatus for communication, and a computer-readable medium. An example of the method includes: conducting, based on a channel response between a transmitter and a receiver, spectral shaping on a first sequence at the transmitter, so as to obtain an intermediate sequence, where the spectral shaping at least partially counters the channel response; remapping the intermediate sequence, so as to obtain a second sequence, where the second sequence has less signal levels than the intermediate sequence; and transmitting the second sequence to the receiver, so as to train an equalizer of the receiver. In this way, the method can accelerate training of the equalizer without sacrificing performance of the equalizer or introducing any additional hardware cost.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 23, 2023
    Applicant: Nokia Solutions and Networks Oy
    Inventors: Dong Xu ZHANG, Shuang YAO, Chen Hui YE
  • Patent number: 11817181
    Abstract: Embodiments of the present disclosure belongs to the technical field of animal feed and provides a method for rapidly evaluating metabolizable energy of goose diet by using a technique of simulative digestion gross energy. By using the technical means combining the biological method and the simulative digestion gross energy technique, metabolizable energy of goose feed can be evaluated quickly. Based on the “stomach-small intestine” two-step enzymatic methods, it is the first time to establish a regression equation between the metabolizable energy change and fiber level in the cecum to rectify the value of simulative digestion gross energy in the cecal microbial digestion phase, making the simulative digestion gross energy technique more reasonable in the assessment of metabolizable energy in geese. Results show that the use of simulative digestion gross energy technique to assess the metabolizable energy of goose feed value is highly feasible.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: November 14, 2023
    Assignee: South China Agricultural University
    Inventors: Wence Wang, Lin Yang, Jing Yang, Yongwen Zhu, Hui Ye, Yu Li, Heng Wang, Daiyang Xia, Jianying Chen, Weiqing Ma, Yang Fu, Shanshan Zhu
  • Patent number: 11812529
    Abstract: An electronic driver for transforming an electronic ballast input voltage into an operating voltage for an LED lighting module. The driver includes a flicker eliminating circuit, which is adapted to operate in a saturation mode when the input voltage is below a threshold voltage. It operates in a switch mode when the input voltage is above a threshold voltage. A voltage drop in the flicker eliminating circuit in the saturation mode is higher than in the switch mode.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: November 7, 2023
    Assignee: LEDVANCE GMBH
    Inventors: Zhifeng Li, Hui Ye
  • Publication number: 20230227181
    Abstract: A vibration isolation/damping satellite mount of a chopped carbon fiber reinforced thermoplastic composite material mainly includes two parts, and the two parts are connected through bolts. Considering the limitation of the molding process, the mount configuration is further optimized, and the mount structure is prepared by using the injection molding process. Furthermore, the vibration isolation/damping satellite mount of the chopped carbon fiber reinforced thermoplastic composite material prepared in the present invention can be used for large loads and complex working conditions, and the connectivity, overall strength stability, vibration isolation performance and service life of the mount all meet the design requirements.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 20, 2023
    Inventors: Tong LI, Fei NIU, Hui YE, Bo WANG
  • Publication number: 20230187608
    Abstract: An electrochemical cell includes an anode, a cathode, a separator, and a liquid electrolyte. The cathode includes an active material, a conductive material, a binder, and a gelling powder. The separator is arranged between the anode and the cathode. The separator is configured to prevent direct contact between the anode and the cathode. The liquid electrolyte transports positively charged ions between the cathode and the anode.
    Type: Application
    Filed: July 29, 2022
    Publication date: June 15, 2023
    Inventors: Hui Ye, Prabhakar A. Tamirisa, Kaimin Chen, Gaurav Jain
  • Patent number: D984240
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: April 25, 2023
    Assignee: Ningbo Honest Hardware Co., Ltd.
    Inventor: Hui Ye
  • Patent number: D1007278
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: December 12, 2023
    Inventor: Hui Ye