Patents by Inventor Hui-Ying Ding

Hui-Ying Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10163762
    Abstract: A semiconductor assembly includes a semiconductor die comprising lower and upper electrical contacts. A lead frame having a lower die pad is electrically and mechanically connected to the lower electrical contact of the die. An upper conductive member has a first portion electrically and mechanically connected to the upper electrical contact of the die. A lead terminal has a surface portion electrically and mechanically connected to a second portion of the conductive member. The surface portion of the lead terminal and/or the second portion of the conductive member has a series of grooves disposed therein. Packaging material encapsulates the semiconductor die, at least a portion of the lead frame, at least a portion of the upper conducive member and at least a portion of the lead terminal.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: December 25, 2018
    Assignee: VISHAY GENERAL SEMICONDUCTOR LLC
    Inventors: Hui-Ying Ding, Pengnian Wang, Tao Yu, Jun-Feng Liu, Jun-Kai Bai, Chih-Ping Peng
  • Publication number: 20160365305
    Abstract: A semiconductor assembly includes a semiconductor die comprising lower and upper electrical contacts. A lead frame having a lower die pad is electrically and mechanically connected to the lower electrical contact of the die. An upper conductive member has a first portion electrically and mechanically connected to the upper electrical contact of the die. A lead terminal has a surface portion electrically and mechanically connected to a second portion of the conductive member. The surface portion of the lead terminal and/or the second portion of the conductive member has a series of grooves disposed therein. Packaging material encapsulates the semiconductor die, at least a portion of the lead frame, at least a portion of the upper conducive member and at least a portion of the lead terminal.
    Type: Application
    Filed: June 10, 2015
    Publication date: December 15, 2016
    Inventors: Hui-Ying Ding, Pengnian Wang, Tao Yu, Jun-Feng Liu, Jun-Kai Bai, Chih-Ping Peng
  • Patent number: 9041188
    Abstract: An axially-mountable device includes a semiconductor chip comprising lower and upper electrical contacts. A lower die pad is electrically and mechanically connected to the lower electrical contact of the chip. An upper die pad is electrically and mechanically connected to the upper electrical contact of the chip. A first axially extending electrical lead is electrically and mechanically connected to the upper die pad and extends in a first axial direction. A second axially extending electrical lead is electrically and mechanically connected to the lower die pad and extends in a second axial direction that is opposite to the first axial direction. Packaging material encapsulates the semiconductor chip, the upper and lower die pads and a portion of the first and second axially extending leads. The first and second leads extend from the packaging material and are adapted to allow the device to be axially-mounted with another electrical component.
    Type: Grant
    Filed: November 10, 2012
    Date of Patent: May 26, 2015
    Assignee: VISHAY GENERAL SEMICONDUCTOR LLC
    Inventors: Wan-Lan Chiang, Chih-Ping Peng, Hui-Ying Ding
  • Publication number: 20140131842
    Abstract: An axially-mountable device includes a semiconductor chip comprising lower and upper electrical contacts. A lower die pad is electrically and mechanically connected to the lower electrical contact of the chip. An upper die pad is electrically and mechanically connected to the upper electrical contact of the chip. A first axially extending electrical lead is electrically and mechanically connected to the upper die pad and extends in a first axial direction. A second axially extending electrical lead is electrically and mechanically connected to the lower die pad and extends in a second axial direction that is opposite to the first axial direction. Packaging material encapsulates the semiconductor chip, the upper and lower die pads and a portion of the first and second axially extending leads. The first and second leads extend from the packaging material and are adapted to allow the device to be axially-mounted with another electrical component.
    Type: Application
    Filed: November 10, 2012
    Publication date: May 15, 2014
    Applicant: Vishay General Semiconductor LLC
    Inventors: Wan-Lan Chiang, Chih-Ping Peng, Hui-Ying Ding
  • Patent number: 7768104
    Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: August 3, 2010
    Assignee: Vishay General Semiconductor, Inc.
    Inventors: Ta-Te Chou, Hui-Ying Ding, Yun Zhang, Hong-Yun He, Li-Zhu Hao
  • Publication number: 20090236705
    Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 24, 2009
    Applicant: VISHAY GENERAL SEMICONDUCTOR, INC.
    Inventors: TA-TE CHOU, HUI-YING DING, YUN ZHANG, HONG-YUN HE, LI-ZHU HAO