Abstract: Data arrangement schemes of imagery data and filter coefficients stored in a CNN based digital IC for extracting features out of an input image are disclosed. The CNN based digital IC contains NE number of CNN processing engines connected in a loop via a clock-skew circuit for cyclic data access. Imagery data and filter coefficients are arranged in a specific scheme to fit the data access pattern that the CNN based digital IC requires to operate. The specific scheme is determined based on the number of imagery data, the number of filters and the characteristics of the CNN based digital IC. The characteristics include, but are not limited to, the number of CNN processing engines, the connection direction of clock-skew circuit and the number of the I/O data bus.

Abstract: Digital integrated circuit (IC) for extracting features out of input image is disclosed. The IC contains one or more identical cellular neural networks (CNN) processing engines operatively coupled to at least one I/O data bus. Each CNN processing engine includes a CNN processing block, a first set of memory buffers for storing imagery data and a second set of memory buffers for storing filter coefficients. CNN processing block is configured to simultaneously perform 3×3 convolutions at M×M pixel locations using received imagery data and corresponding filter coefficients. Imagery data represents a (M+2)-pixel by (M+2)-pixel region of the input image. CNN processing block further performs rectification and/or 2×2 pooling operations as directed. When two or more CNN processing engines are configured on the IC, CNN processing engines are connected to one another as a loop via a clock-skew circuit for cyclic data access. M is a positive integer.

Abstract: Data arrangement schemes of imagery data and filter coefficients stored in a CNN based digital IC for extracting features out of an input image are disclosed. The CNN based digital IC contains NE number of CNN processing engines connected in a loop via a clock-skew circuit for cyclic data access. Imagery data and filter coefficients are arranged in a specific scheme to fit the data access pattern that the CNN based digital IC requires to operate. The specific scheme is determined based on the number of imagery data, the number of filters and the characteristics of the CNN based digital IC. The characteristics include, but are not limited to, the number of CNN processing engines, the connection direction of clock-skew circuit and the number of the I/O data bus.

Abstract: Digital integrated circuit (IC) for extracting features out of input image is disclosed. The IC contains one or more identical cellular neural networks (CNN) processing engines operatively coupled to at least one I/O data bus. Each CNN processing engine includes a CNN processing block, a first set of memory buffers for storing imagery data and a second set of memory buffers for storing filter coefficients. CNN processing block is configured to simultaneously perform 3×3 convolutions at M×M pixel locations using received imagery data and corresponding filter coefficients. Imagery data represents a (M+2)-pixel by (M+2)-pixel region of the input image. CNN processing block further performs rectification and/or 2×2 pooling operations as directed. When two or more CNN processing engines are configured on the IC, CNN processing engines are connected to one another as a loop via a clock-skew circuit for cyclic data access. M is a positive integer.