Patents by Inventor Hui Juan Cheng

Hui Juan Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for providing live insertion
    Patent number: 7944239
    Abstract: System and method for providing live insertion. According to an embodiment, the present invention provides an integrated circuit. The integrated circuit includes a first port configured to be electrically coupled to a pad. The first port includes a first connection, a second connection, and a third connection. The integrated circuit also includes a first resistor having a first terminal and a second terminal. Additionally, the integrated circuit includes a second resistor having a third terminal and a forth terminal. The integrated circuit additionally includes a voltage source configured to provided a first voltage. The integrated circuit further includes a first PMOS transistor having a first gate terminal, a first drain terminal and a first source terminal. In addition, the integrated circuit includes a second PMOS transistor having a second gate terminal, a second drain terminal, and a second source terminal.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Ta Lee Yu, Hai Feng Xue, Hui Juan Cheng
  • SYSTEM AND METHOD FOR PROVIDING LIVE INSERTION
    Publication number: 20080270662
    Abstract: System and method for providing live insertion. According to an embodiment, the present invention provides an integrated circuit. The integrated circuit includes a first port configured to be electrically coupled to a pad. The first port includes a first connection, a second connection, and a third connection. The integrated circuit also includes a first resistor having a first terminal and a second terminal. Additionally, the integrated circuit includes a second resistor having a third terminal and a forth terminal. The integrated circuit additionally includes a voltage source configured to provided a first voltage. The integrated circuit further includes a first PMOS transistor having a first gate terminal, a first drain terminal and a first source terminal. In addition, the integrated circuit includes a second PMOS transistor having a second gate terminal, a second drain terminal, and a second source terminal.
    Type: Application
    Filed: July 19, 2007
    Publication date: October 30, 2008
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Ta Lee Yu, Hai Feng Xue, Hui Juan Cheng