Abstract: Systems and methods for detecting Input/Output (I/O) device connection are described herein. The method includes physically coupling an I/O device to a host port through a first signal line and a second signal line. The method also includes driving the first signal line or the second signal line high via an active buffer of the I/O device. The method also includes providing an acknowledgement signal from the host to the device through the other signal line that is not being driven high by the active buffer of the I/O device.

Abstract: A method for explicit control message signaling includes sending a single ended 1 signal on a pair of data lines, wherein the pair of data lines includes a first data line and a second data line. A voltage of the first data line is driven to a logic 1, while pulsing the voltage of the second data line between a logic 1 and a logic 0, wherein the pulses represent a control message.

Abstract: A method and system for communicating data between two devices are described herein. The method detects an electrical signal of a first protocol from a first device in a repeater, wherein the first protocol comprises single-ended signaling. The method also determines the speed of the electrical signal. Additionally, the method converts the electrical signal of the first protocol into an electrical signal of a second protocol based on the speed of the electrical signal. The second protocol comprises differential signaling. Furthermore, the method sends the electrical signal of the second protocol to a second device. In addition, the method stops the electrical signal of the second protocol to the second device when the electrical signal of the second protocol indicates an end of data flow.

Abstract: Systems and method for operating a low power universal serial bus are described herein. A universal serial bus port includes a link layer and protocol layer that are compatible with a standard USB2 protocol. The link layer and protocol layer to control a physical layer for transmitting and receiving data on a pair of signal lines. The physical layer includes a fully-digital Low-Speed/Full-Speed (LS/FS) transceiver to transmit and receive data on the pair signal lines using single-ended digital communications on the pair of signal lines.

Abstract: Systems and methods for detecting Input/Output (I/O) device connection are described herein. The method includes physically coupling an I/O device to a host port through a first signal line and a second signal line. The method also includes driving the first signal line or the second signal line high via an active buffer of the I/O device. The method also includes providing an acknowledgement signal from the host to the device through the other signal line that is not being driven high by the active buffer of the I/O device.

Abstract: Systems and methods for operating a universal serial bus are described herein. The method includes sending packet data from a USB2 device to a USB2 host on a pair of signal lines, and after sending the packet data, sending an End-Of-Packet (EOP) signal from the USB2 device to the USB2 host. The method also includes, entering the USB2 device into idle state after sending the EOP signal. The method also includes sending a digital ping from the USB2 device to the USB2 host to indicate device presence during idle state.

Abstract: Systems and method for operating a low power universal serial bus are described herein. A universal serial bus port includes a link layer and protocol layer that are compatible with a standard USB2 protocol. The link layer and protocol layer to control a physical layer for transmitting and receiving data on a pair of signal lines. The physical layer includes a fully-digital Low-Speed/Full-Speed (LS/FS) transceiver to transmit and receive data on the pair signal lines using single-ended digital communications on the pair of signal lines.

Abstract: A method for explicit control message signaling includes sending a single ended 1 signal on a pair of data lines, wherein the pair of data lines includes a first data line and a second data line. A voltage of the first data line is driven to a logic 1, while pulsing the voltage of the second data line between a logic 1 and a logic 0, wherein the pulses represent a control message.

Abstract: A method and system for communicating data between two devices are described herein. The method detects an electrical signal of a first protocol from a first device in a repeater, wherein the first protocol comprises single-ended signaling. The method also determines the speed of the electrical signal. Additionally, the method converts the electrical signal of the first protocol into an electrical signal of a second protocol based on the speed of the electrical signal. The second protocol comprises differential signaling. Furthermore, the method sends the electrical signal of the second protocol to a second device. In addition, the method stops the electrical signal of the second protocol to the second device when the electrical signal of the second protocol indicates an end of data flow.

Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.

Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.

Abstract: A structure and a method for suppressing noise of electronic equipment utilize a noise suppresser to cover a periphery or a surface of the electronic equipment or the circuits thereof. The noise suppresser comprises elements of zirconia and at least one oxide that serves as a stabilizer. By compounding afore elements and sintering process the compound, a zirconia ceramics is formed. Simply made and costing less, the noise suppresser yet offers numerous applicable means. The noise around the electronic equipment is efficiently reduced or suppressed while operating. Thereby, the quality of electronic signals transmitted between the circuits of the electronic equipment is enhanced. Further, when the noise suppressor is disposed on a periphery or a surface of the electronic equipment or the circuits thereof, far infrared and resonance are concurrently generated while the electronic equipment is electrified, so that accumulated heat in the electronic equipment is dispersed for reducing noise.

Abstract: Systems and methods of supporting video streaming operations may involve transmitting a pulse width modulated (PWM) control signal to an imaging device, wherein the imaging devices identifies control data based on a duty cycle of the control signal. The imaging device can configure a video stream based on the control data and synchronize transmission of the video stream based on a frequency of the control signal.

Abstract: Methods of making unique water treatment compositions are provided. In one embodiment, a method of making a doped metal oxide or hydroxide for treating water comprises: disposing a metal precursor solution and a dopant precursor solution in a reaction vessel comprising water to form a slurry; and precipitating the doped metal oxide or hydroxide from the slurry.

Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.

Abstract: Nanostructured manganese-containing compositions having reduced manganese dissolution and methods of making and using the same are provided. In one embodiment, a composition of matter comprises a nanostructured oxide or hydroxide doped with Mn4+. The composition of matter can be made by forming a nanostructured oxide or hydroxide material doped with Mn3+ and oxidizing the Mn3+ to Mn4+ to reduce dissolution of the manganese in the nanostructured oxide or hydroxide material. In another embodiment, a method of reducing dissolution of manganese present in a nanostructured MnO2 material comprises: doping a nanostructured MnO2 material with Fe3+ to reduce the dissolution of the manganese.

Abstract: Disclosed are embodiments of methods and circuits to generate spread spectrum clocks.

Abstract: A water treatment composition includes an oxidizing component and an adsorbing component, wherein one or both of the oxidizing component and adsorbing component comprise nanostructured materials. The water treatment compositions are useful in at least partially removing contaminants such as metallic or cationic arsenic, lead, chromium, and/or mercury from water.

Abstract: Disclosed are embodiments of methods and circuits to generate spread spectrum clocks.

Abstract: This invention provides compositions, organisms and methodologies employing a novel human protein kinase, MCRK1. The novel human kinase has sequence homology to rat myotonic dystrophy kinase-related Cdc42 binding kinase (MRCK) alpha. The gene encoding the novel kinase is localized in locus 11q13 of human chromosome 11. The novel protein kinase comprises multiple functional/structural domains that include a kinase domain, a pkinase_C domain, a DAG-PE binding domain, and a CNH domain. The sequence and structure similarity between the novel human protein and rat MRCK alpha indicates that the novel human protein may function as a downstream effector of Cdc42 in cytoskeleton reorganization.