Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 ?. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.

Abstract: Examples of the present technology include semiconductor processing methods to form boron-containing materials on substrates. Exemplary processing methods may include delivering a deposition precursor that includes a boron-containing precursor to a processing region of a semiconductor processing chamber. A plasma may be formed from the deposition precursor within the processing region of the semiconductor processing chamber. The methods may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, where the substrate is characterized by a temperature of less than or about 50° C. The as-deposited boron-containing material may be characterized by a surface roughness of less than or about 2 nm, and a stress level of less-than or about ?500 MPa. In some embodiments, a layer of the boron-containing material may function as a hardmask.

Abstract: Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. An inert precursor and a hydrocarbon-containing precursor may be flowed into the substrate processing region of the substrate processing chamber, where a flow rate ratio of the inert precursor to the hydrocarbon-containing precursor may be greater than or about 10:1. A plasma may be generated from the inert precursor and the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.

Abstract: Embodiments of the present disclosure generally relate to clean methods for processing chambers, and more specifically relate to plasma clean methods for removing carbon films from surfaces within the processing chamber. A method for cleaning includes introducing a cleaning gas into a processing region within a processing chamber, where interior surfaces of the processing chamber have a coating containing amorphous carbon. The cleaning gas contains oxygen gas and a noble gas. The method also includes generating an ion coupled plasma (ICP) from the cleaning gas within an upper portion of the processing region and generating a bias across a substrate support in a lower portion of the processing region. The method further includes exposing the amorphous carbon to atomic oxygen ions produced from the oxygen gas and the ICP and removing the amorphous carbon from the interior surfaces with the atomic oxygen ions during a cleaning process.

Abstract: Memory devices and methods of manufacturing memory devices are provided. A plasma enhanced chemical vapor deposition (PECVD) method to form a memory cell film stack having more than 50 layers as an alternative for 3D-NAND cells is described. The memory stack comprises alternating layers of a first material layer and a second material layer.

Abstract: Methods of etching film stacks to form gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.

Abstract: A non-conformal, highly selective liner for etch methods in semiconductor devices is described. A method comprises forming a film stack on a substrate; etching the film stack to form an opening; depositing a non-conformal liner in the opening; etching the non-conformal liner from the bottom of the opening; and selectively etching the film stack relative to the non-conformal liner to form a logic or memory hole. The non-conformal liner comprises one or more of boron, carbon, or nitrogen.

Abstract: Methods of etching film stacks to from gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.

Abstract: Methods of etching film stacks to from gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.

Abstract: An extended base of a mobile terminal and a power supply management method for the extended base is described herein. When a mobile terminal is inserted into an extended base, an enable circuit of the extended base is electrically connected to the mobile terminal and generates an enable signal, and a switch circuit outputs a voltage under control of the enable signal, so that a power supply of the extended base supplies power under control of the voltage. When the mobile terminal is removed from the extended base, the enable circuit stops generating the enable signal, and the switch circuit stops outputting the voltage, so that the power supply cannot supply power under the control of the voltage.

Abstract: Methods of depositing a silicon nitride film at low temperatures are discussed. The silicon nitride films of some embodiments are highly conformal, have low etch rates, low atomic oxygen concentrations and/or good hermeticity. The films may be used to protect chalcogen materials in PCRAM devices. Some embodiments utilize an ALD process comprising a nitrogen precursor, a silicon precursor and a plasma treatment in each cycle. Some embodiments perform the plasma treatment at a lower pressure than the precursor exposures.

Abstract: An extended base of a mobile terminal and a power supply management method for the extended base is described herein. When a mobile terminal is inserted into an extended base, an enable circuit of the extended base is electrically connected to the mobile terminal and generates an enable signal, and a switch circuit outputs a voltage under control of the enable signal, so that a power supply of the extended base supplies power under control of the voltage. When the mobile terminal is removed from the extended base, the enable circuit stops generating the enable signal, and the switch circuit stops outputting the voltage, so that the power supply cannot supply power under the control of the voltage.