Abstract: According to various embodiments, a PMUT device may include a wafer, an active layer including a piezoelectric stack, an intermediate layer having a cavity therein where the intermediate layer is disposed between the wafer and the active layer such that the cavity is adjoining the piezoelectric stack. A via may be formed through the active layer and the intermediate layer to the wafer. A metallic layer may be disposed over the active layer and over surfaces of the via. The intermediate layer may include an interposing material surrounding the cavity, and may further include a sacrificial material surrounding the via. The sacrificial material may be different from the interposing material. The metallic layer may include a first member at least substantially overlapping the piezoelectric stack, a second member extending from the first member to the cavity, and a third member extending into the active layer to contact an electrode therein.

Abstract: Methods of forming a shear-mode acoustic wave filter on V-shaped grooves of a [100] crystal orientation Si layer over a substrate and the resulting devices are provided. Embodiments include forming a set of V-shaped grooves in a [100] crystal orientation Si layer over a substrate; and forming a shear-mode acoustic wave filter over the V-shaped grooves, the shear-mode acoustic wave filter including a first metal layer, a thin-film piezoelectric layer, and a second metal layer, wherein the second metal layer is an IDT pattern or a sheet.

Abstract: A BAW resonator/filter with a monolithic TFE package that defines an acoustic BC and suppresses resonances from the low-Q piezoelectric area of the resonator and resulting devices are provided. Embodiments include a BAW resonator over a dielectric layer, the BAW resonator including a first metal layer, a thin-film piezoelectric layer, and a second metal layer; a first cavity in the dielectric layer under the first metal layer and a second cavity over the first cavity on the second metal layer; and a pair of TFE anchors on the second metal layer, each TFE anchor adjacent to and on an opposite side of the second cavity and extending beyond the first metal layer.

Abstract: Methods of forming a shear-mode chemical/physical sensor for liquid environment sensing on V-shaped grooves of a [100] crystal orientation Si layer and the resulting devices are provided. Embodiments include forming a set of V-shaped grooves in a [100] Si layer over a substrate; forming an acoustic resonator over and along the V-shaped grooves, the acoustic resonator including a first metal layer, a thin-film piezoelectric layer, and a second metal layer in an IDT pattern or a sheet; and forming at least one functional layer along a slope of the acoustic resonator.

Abstract: Methods of forming a shear-mode acoustic wave filter on V-shaped grooves of a [100] crystal orientation Si layer over a substrate and the resulting devices are provided. Embodiments include forming a set of V-shaped grooves in a [100] crystal orientation Si layer over a substrate; and forming a shear-mode acoustic wave filter over the V-shaped grooves, the shear-mode acoustic wave filter including a first metal layer, a thin-film piezoelectric layer, and a second metal layer, wherein the second metal layer is an IDT pattern or a sheet.

Abstract: A dual-mode resonator, devices employing the dual-mode resonator, and the methods of making the resonator and the devices are disclosed. Embodiments include a dual-mode resonator including a semiconductor substrate; a material on the semiconductor substrate, having a cavity formed therein; a seed layer over the cavity in a V-shape, wherein sides of the V-shape form an angle of 15 to 25 degrees with a horizontal line; a bottom electrode on the seed layer; an acoustic layer on the bottom electrode; a top electrode on the acoustic layer; and a mass loading layer on the top electrode; and a cap over the dual-mode resonator.

Abstract: Methods of forming a thin-film piezoelectric acoustic filter, a GaN-channel/buffer Bragg reflector, and a monolithically integrated GaN HEMT PA and CMOS over a [111] crystal orientation Si handle of a SOI wafer and resulting devices are provided. Embodiments include providing a SOI wafer including a [111] crystal orientation Si handle, a BOX layer, and a top Si layer; forming a CMOS device over the top Si layer; and forming a Bragg reflector over the [111] crystal orientation Si handle wafer, the Bragg reflector including a GaN stack with alternating layers of high/low acoustic impedance.

Abstract: A method of forming a CMOS device and a GaN PA structure on a 100 Si substrate having a surface orientated in 111 direction and the resulting device are provided. Embodiments include forming a device with a protective layer over a portion of a Si substrate; forming a V-shaped groove in the Si substrate; forming a buffer layer, a GaN layer, an AlGaN layer and a passivation layer sequentially over the Si substrate; forming trenches through the passivation and the AlGaN layers; forming second trenches through the passivation layer; forming electrode structures over portions of the passivation layer and filling the first and second trenches; removing portions of the passivation layer, the AlGaN layer and the GaN layer outside of the V-shaped groove down to the buffer layer; forming a dielectric layer over the Si substrate; and forming vias through the dielectric layer down to electrode structures and the device.

Abstract: Methods of forming a thin-film piezoelectric acoustic filter, a GaN-channel/buffer Bragg reflector, and a monolithically integrated GaN HEMT PA and CMOS over a [111] crystal orientation Si handle of a SOI wafer and resulting devices are provided. Embodiments include providing a SOI wafer including a [111] crystal orientation Si handle, a BOX layer, and a top Si layer; forming a CMOS device over the top Si layer; and forming a Bragg reflector over the [111] crystal orientation Si handle wafer, the Bragg reflector including a GaN stack with alternating layers of high/low acoustic impedance.

Abstract: Methods of designing a BAW resonator and filter and the resulting devices are provided. Embodiments include patterning a bottom electrode of a resonator; patterning a top electrode of the resonator; and intersecting areas of the top and bottom electrodes to provide an effective area of the resonator, wherein the effective area includes a closed-loop contour line including a pulse function pattern with pre-defined amplitude, period and a number of repetitions of pulses along the closed-loop contour line.

Abstract: A method of forming a CMOS device and a GaN PA structure on a 100 Si substrate having a surface orientated in 111 direction and the resulting device are provided. Embodiments include forming a device with a protective layer over a portion of a Si substrate; forming a V-shaped groove in the Si substrate; forming a buffer layer, a GaN layer, an AlGaN layer and a passivation layer sequentially over the Si substrate; forming trenches through the passivation and the AlGaN layers; forming second trenches through the passivation layer; forming electrode structures over portions of the passivation layer and filling the first and second trenches; removing portions of the passivation layer, the AlGaN layer and the GaN layer outside of the V-shaped groove down to the buffer layer; forming a dielectric layer over the Si substrate; and forming vias through the dielectric layer down to electrode structures and the device.

Abstract: Integrated circuits having shielded micro-electromechanical system (MEMS) devices and method for fabricating shielded MEMS devices are provided. In an example, an integrated circuit having a shielded MEMS device includes a substrate, a ground plane including conductive material over the substrate, and a dielectric layer over the ground plane. The integrated circuit further includes a MEMS device over the ground plane. Also, the integrated circuit includes a conductive pillar through the dielectric layer and in contact with the ground plane. The integrated circuit includes a metallic thin film over the MEMS device and in contact with the conductive pillar, wherein the metallic thin film, the conductive pillar and the ground plane form an electromagnetic shielding structure surrounding the MEMS device. Further, the integrated circuit includes an acoustic shielding structure over the substrate and adjacent the electromagnetic shielding structure.

Abstract: A device, such as a MEMS device, with stress tuning to achieve a desired stack stress across the wafer. The stress tuning includes trimming a stress compensation layer over a target layer having different stresses in different target layer regions. The trimming may include ion beam trimming to produce a stress compensation layer having different thicknesses over the different target layer regions to balance the stress of the target layer to a desired stress. The desired stress may result in almost zero residual stress to produce an almost flat MEMS device.

Abstract: A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.

Abstract: Methods of designing a BAW resonator having fractal geometry and the resulting devices are provided. Embodiments include providing a fractal generator function; providing three or more line segments; applying the fractal generator function to each of the three or more line segments to form three or more respective fractal line segments, each of the three or more fractal line segments having a respective start point and endpoint and at least four sub-segments; and connecting an endpoint of each one of the three or more fractal line segments to a successive start point of another of the three or more fractal line segments to form a closed-loop contour line representative of an area of an electrode of a BAW resonator, the closed-loop contour line having a fractal dimension that is greater than one and less than two.

Abstract: Methods of designing a BAW resonator having fractal geometry and the resulting devices are provided. Embodiments include providing a fractal generator function; providing three or more line segments; applying the fractal generator function to each of the three or more line segments to form three or more respective fractal line segments, each of the three or more fractal line segments having a respective start point and endpoint and at least four sub-segments; and connecting an endpoint of each one of the three or more fractal line segments to a successive start point of another of the three or more fractal line segments to form a closed-loop contour line representative of an area of an electrode of a BAW resonator, the closed-loop contour line having a fractal dimension that is greater than one and less than two.

Abstract: An integrated monolithic device with a micro-electromechanical system (MEMS) and an integrated circuit (IC) and a method of forming thereof is disclosed. The monolithic device includes a substrate with IC components and a MEMS formed over the IC. A back-end-of-line (BEOL) dielectric having IC interconnect pads in a pad level is formed over the substrate. A MEMS is formed over the BEOL dielectric with the IC interconnect pads. The MEMS includes a MEMS stack having an active MEMS layer and patterned top and bottom MEMS electrodes formed on the top and bottom surfaces of the active MEMS layer. IC MEMS contact vias are formed at least partially through the active MEMS layer. IC MEMS contacts are formed in the IC MEMS contact vias in the active MEMS layer and configured to couple to the IC interconnect pads.

Abstract: A method for forming a lamb acoustic wave resonator and filter and the resulting device are provided. Embodiments include forming a sacrificial layer over a substrate; forming a first electrode over the sacrificial layer; forming a piezoelectric thin film over the first electrode; forming a second electrode over the piezoelectric thin film; forming a hardmask over the second electrode; etching through the hardmask and the second electrode down to the piezoelectric thin film forming self-aligned vias; forming and patterning a photoresist layer over the self-aligned vias; etching through the photoresist layer forming cavities extending through the vias and to the sacrificial layer; and removing the sacrificial layer forming a cavity gap under the cavities and first metal electrode.

Abstract: Integrated circuits having shielded micro-electromechanical system (MEMS) devices and method for fabricating shielded MEMS devices are provided. In an example, an integrated circuit having a shielded MEMS device includes a substrate, a ground plane including conductive material over the substrate, and a dielectric layer over the ground plane. The integrated circuit further includes a MEMS device over the ground plane. Also, the integrated circuit includes a conductive pillar through the dielectric layer and in contact with the ground plane. The integrated circuit includes a metallic thin film over the MEMS device and in contact with the conductive pillar, wherein the metallic thin film, the conductive pillar and the ground plane form an electromagnetic shielding structure surrounding the MEMS device. Further, the integrated circuit includes an acoustic shielding structure over the substrate and adjacent the electromagnetic shielding structure.