Abstract: A method for forming a multi-layer resist (MLR) pattern capable of preventing a generation of a charge-up effect in an exposure to electron beams and reducing alignment detect errors, and employing a silylation process, thereby achieving an improvement in resonance.

Abstract: An edge enhancement phase shifting mask having a recessed opaque layer which optimally exhibits the phase shifting effect at edge portion is disclosed, wherein the mask comprises a transparent substrate having at least one or more trenches spaced apart from each other by a predetermined distance, an opaque layer filling some portion of the trench, and a phase shifting layer formed on the substrate area between the trenches.

Abstract: Methods of making semiconductor memory cells and semiconductor memory devices capable of improving the degree of integration and simplifying the overall manufacturing processes. Within a substrate made of a semiconductor material or an insulating material, at least one trench is formed to provide a capacitor region. In the trench are formed a plate electrode, a capacitor dielectric layer and a storage node electrode which constitute a capacitor. The semiconductor substrate may be used as the plate electrode. In this case, the trench has only the capacitor dielectric layer and the storage node electrode. At the inlet of the trench filled with the constituting elements of the capacitor, a gate electrode and a semiconductor layer as an active layer are formed to extend vertically perpendicular to the trench inlet. A bit line contact is formed on the semiconductor layer. Over the bit line contact are formed a bit line contact and a bit line, in this order.