Abstract: A process for trimming a photoresist layer during the fabrication of a gate electrode in a MOSFET is described. A bilayer stack with a top photoresist layer on a thicker organic underlayer is patternwise exposed with 193 nm or 157 nm radiation to form a feature having a width w1 in the top layer. A pattern transfer through the underlayer is performed with an anisotropic etch based on H2/N2 and SO2 chemistry. The feature formed in the bilayer stack is trimmed by 10 nm or more to a width w2 by a HBr/O2/Cl2 plasma etch. The pattern transfer through an underlying gate layer is performed with a third etch based on HBr/O2/Cl2 chemistry. The underlayer is stripped by an O2 ashing with no damage to the gate electrode. Excellent profile control of the gate electrode is achieved and a larger (w1?w2) is possible than in prior art methods.

Abstract: A method of etching a dielectric layer comprising the following steps. A structure having the dielectric layer formed thereover is provided. A patterned photoresist layer that may be a non-aromatic positive patterned photoresist layer is formed over the dielectric layer. The patterned photoresist layer is used as a mask while etching the dielectric layer with an etching gas comprising a fluorocarbon, and may also further comprise O2, while modulating one or both select powers on and off with a duty cycle or wave form. The select powers being selected from the group consisting of an RF power and a bias power.