Patents by Inventor Hung An Chen

Hung An Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • EUV Lithography System With 3D Sensing and Tunning Modules
    Publication number: 20240103378
    Abstract: The present disclosure provides an extreme ultraviolet (EUV) lithography system including a radiation source and an EUV control system integrated with the radiation source. The EUV control system includes a 3-dimensional diagnostic module (3DDM) designed to collect a laser beam profile of a laser beam from the radiation source in a 3-dimensional (3D) mode, an analysis module designed to analyze the laser beam profile, a database designed to store the laser beam profile, and an EUV control module designed to adjust the radiation source. The analysis module is coupled with the database and the EUV control module. The database is coupled with the 3DDM and the analysis module. The EUV control module is coupled with the analysis module and the radiation source.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventors: Tai-Yu CHEN, Tzu-Jung PAN, Kuan-Hung CHEN, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
  • Two step random access procedure
    Patent number: 11943807
    Abstract: Wireless communication devices are adapted to facilitate a random access procedure. According to one example, scheduled entity can transmit a first transmission that is received by a scheduling entity. The first transmission may include a physical random access channel (PRACH) preamble sequence and a first message including information for determining a device-specific network identifier for the scheduled entity. The scheduling entity may transmit a second transmission that is received by the scheduled entity. The second transmission may include information on a physical downlink control channel (PDCCH) addressed to the device-specific network identifier for the scheduled entity, and a second message on a physical downlink shared channel (PDSCH). Other aspects, embodiments, and features are also included.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Renqiu Wang, Wanshi Chen, Hao Xu, Hung Dinh Ly, Heechoon Lee
  • Semiconductor device and method for forming the same
    Patent number: 11942546
    Abstract: A method includes forming an interfacial layer over a substrate; forming a quasi-antiferroelectric (QAFE) layer over the interfacial layer, in which forming the QAFE layer comprises performing an atomic layer deposition (ALD) cycle, and the ALD cycle includes performing a first sub-cycle for X time(s), in which the first sub-cycle comprises providing a Zr-containing precursor; performing a second sub-cycle for Y time(s), in which the second sub-cycle comprises providing a Hf-containing precursor; and performing a third sub-cycle for Z time(s), in which the third sub-cycle comprises providing a Zr-containing precursor, and in which X+Z is at least three times Y; and forming a gate electrode over the QAFE layer.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: March 26, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY, NATIONAL TAIWAN NORMAL UNIVERSITY
    Inventors: Kuan-Ting Chen, Shu-Tong Chang, Min-Hung Lee
  • Semiconductor package structure
    Patent number: 11942385
    Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: March 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Sheng-Yu Chen, Chang-Lin Yeh, Ming-Hung Chen
  • Techniques for configuring use of an energy saving mode
    Patent number: 11943715
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive, from a wireless network device (e.g., a base station or a transmission reception point (TRP) of the base station), a first control message comprising an indication of a set of energy saving modes of the wireless network device. The UE may receive a second control message indicating a first energy saving mode from the set of energy saving modes, where the first energy saving mode may be indicative of a number of channel state information (CSI) reference signal (CSI-RS) resources used by the wireless network device. The UE may monitor one or more of the CSI-RS resources for a CSI-RS in accordance with the first energy saving mode, and transmit, to the wireless network device, CSI feedback determined based on measurements made by the UE of the CSI-RS.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Muhammad Sayed Khairy Abdelghaffar, Wanshi Chen, Peter Gaal, Gokul Sridharan, Hung Dinh Ly
  • Flex head tool
    Patent number: 11938595
    Abstract: A flex head tool includes a first body and a second body and a. retaining device adapted to position the second body at various angular positions with respect to the first body. The retaining device includes a retainer and an actuator adapted to move the retainer in a first position and a second position. The retainer and the actuator respectively have a first interacting structure and a second interacting structure abutting each other. The second interacting structure has a first and a second position at which the first interacting structure respectively abuts when the actuator is at a first position and a second position. The first and the second positions of the second interacting structure are at different distances from the end of the actuator.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: March 26, 2024
    Assignee: INFAR INDUSTRIAL CO., LTD.
    Inventor: Tai Hung Chen
  • Method of fabricating reticle
    Patent number: 11940737
    Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
  • Optical transmission device and optical communication system
    Patent number: 11942993
    Abstract: An optical transmission device includes: a control module generate a control signal output which includes a slope adjust signal and a bias voltage offset adjust signal according to an input signal indicating a dispersion amount an electrical level adjust signal; a multi-level pulse amplitude modulator; and an asymmetrical optical modulator which is controlled by the slope adjust signal to be operated at one of a positive slope and a negative slope of a transfer function of the asymmetrical optical modulator itself, and is controlled by the bias voltage offset adjust signal of the control signal output to offset a bias voltage point of the asymmetrical optical modulator itself from a quadrature point of the transfer function, and modulates the multi-level pulse amplitude modulation signal to an optical signal to generate an optical modulate signal having a chirp.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 26, 2024
    Assignee: Molex, LLC
    Inventors: Kuen-Ting Tsai, Wei-Hung Chen, Zuon-Min Chuang, Yao-Wen Liang
  • Layout pattern of magnetoresistive random access memory
    Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • UNIFORM GATE WIDTH FOR NANOSTRUCTURE DEVICES
    Publication number: 20240096895
    Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
  • INTEGRATED CIRCUIT DIE WITH MEMORY MACRO INCLUDING THROUGH-SILICON VIA AND METHOD OF FORMING THE SAME
    Publication number: 20240096757
    Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Hidehiro FUJIWARA, Tze-Chiang HUANG, Hong-Chen CHENG, Yen-Huei CHEN, Hung-Jen LIAO, Jonathan Tsung-Yung CHANG, Yun-Han LEE, Lee-Chung LU
  • FOLDABLE ELECTRONIC DEVICE
    Publication number: 20240098932
    Abstract: A foldable electronic device, including a first body, a second body, an air valve movably disposed in the first body, at least one triggering member, and a hinge connecting the first body and the second body, is provided. The first body has multiple openings respectively located at two opposite surfaces. The triggering member is movably disposed in the first body and has a part exposed outside the first body. The air valve and the triggering member are mutually on moving paths of each other. The first body and the second body are rotated to be folded or unfolded relative to each other by the hinge. A part of the triggering member is suitable for bearing a force such that the triggering member drives the air valve, so that the air valve opens or closes the openings.
    Type: Application
    Filed: July 19, 2023
    Publication date: March 21, 2024
    Applicant: Acer Incorporated
    Inventors: Hui-Ping Sun, Jui-Yi Yu, Chun-Hung Wen, Yen-Chou Chueh, Yu-Ming Lin, Chun-Hsien Chen
  • LIGHT EMITTING MODULE
    Publication number: 20240097080
    Abstract: A light emitting module includes a carrier, a light emitting element, a reflection layer, and a fluorescent layer. The light emitting element is disposed on the carrier. The reflection layer is disposed on the carrier and surrounds the light emitting element. The fluorescent layer covers at least part of the light emitting element. The disadvantages of over broad light emitting angle and low illuminance may be solved. Comparing with the related art, the present disclosure achieves an object of increasing the illuminance by at least 10%.
    Type: Application
    Filed: July 6, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Lun HSING CHEN, Jung-Hao HUNG, Ya-Yu HUNG, Yi-Ting KUO
  • MEMORY DEVICE SENSE AMPLIFIER CONTROL
    Publication number: 20240096400
    Abstract: A memory device includes a memory bank with a memory cell connected to a local bit line and a word line. A first local data latch is connected to the local bit line and has an enable terminal configured to receive a first local clock signal. A word line latch is configured to latch a word line select signal, and has an enable terminal configured to receive a second local clock signal. A first global data latch is connected to the first local data latch by a global bit line, and the first global data latch has an enable terminal configured to receive a global clock signal. A global address latch is connected to the word line latch and has an enable terminal configured to receive the global clock signal. A bank select latch is configured to latch a bank select signal, and has an enable terminal configured to receive the second local clock signal.
    Type: Application
    Filed: January 23, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Yuan CHEN, Hau-Tai SHIEH, Cheng Hung LEE
  • INDICATING NETWORK STATE VIA BANDWIDTH PART FRAMEWORK
    Publication number: 20240098707
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a network node may transmit, and a user equipment (UE) may receive, information that configures a periodic bandwidth part (BWP) switching pattern that indicates a sequence of BWPs, wherein each BWP in the sequence of BWPs is associated with a respective network state. The UE and the network node may communicate according to the periodic BWP switching pattern, wherein the UE and the network node may communicate by sequentially switching among the BWPs in the sequence of BWPs indicated in the periodic BWP switching pattern, wherein each BWP in the sequence of BWPs is associated with a configuration corresponding to the respective network state associated with the BWP. Numerous other aspects are provided.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Ahmed Attia ABOTABL, Hung Dinh LY, Yu ZHANG, Krishna Kiran MUKKAVILLI, Wanshi CHEN
  • METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN WIRELESS COMMUNICATION SYSTEMS
    Publication number: 20240098833
    Abstract: A method for mobility enhancement in wireless communication systems is provided. The method is performed by a User Equipment (UE) configured with a first Small Data Transmission (SDT) configuration by a first cell. The method includes receiving a Radio Resource Control (RRC) release message including a suspend configuration from the first cell; transitioning to an RRC INACTIVE state in response to receiving the RRC release message; receiving, in the RRC INACTIVE state, a System Information Block Type 1 (SIB1) including a second SDT configuration from a second cell; camping on the second cell in response to receiving the SIB1 from the second cell; and while the UE is camping on the second cell, refraining from using the first SDT configuration to initiate an SDT procedure associated with the second cell in a case that the UE does not support performing the SDT procedure associated with the second cell.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: YUNG-LAN TSENG, YEN-HUA LI, HAI-HAN WANG, HUNG-CHEN CHEN
  • SEMICONDUCTOR PACKAGE ASSEMBLY
    Publication number: 20240096861
    Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes first semiconductor die, a second semiconductor die and a memory package. The first semiconductor die and the second semiconductor die are stacked on each other. The first semiconductor die includes a first interface and a third interface. The first interface overlaps and is electrically connected to the second interface arranged on the second semiconductor die. The third interface is arranged on a first edge of the first semiconductor die. The memory package is disposed beside the first semiconductor die, wherein the memory package is electrically connected to the first semiconductor die by the third interface.
    Type: Application
    Filed: August 23, 2023
    Publication date: March 21, 2024
    Inventors: Che-Hung KUO, Hsiao-Yun CHEN, Wen-Pin CHU, Chun-Hsiang HUANG
  • DIRECTIONAL RADIATION CONTROL DEVICES
    Publication number: 20240097323
    Abstract: In some examples, a device can include an antenna to emit waves in a radiation pattern having a first beamwidth, a directional radiation control device located in a path of the waves, where the directional radiation control device is to receive the waves from the antenna and is shaped to cause the waves to be directed in a different radiation pattern having a second beamwidth that is larger than the first beamwidth.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Chin-Hung Ma, Pai-Cheng Huang, Po Chao Chen, Shih-Huang Wu
  • PACKAGE STRUCTURE
    Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Method and apparatus for RRC state transition
    Patent number: 11937327
    Abstract: A user equipment (UE) and a method performed by the UE are provided. The method includes transitioning from a radio resource control (RRC) inactive (RRC_INACTIVE) state to an RRC idle (RRC_IDLE) state upon determining that the UE has failed to find a suitable cell and camped on an acceptable cell; and discarding a radio access network (RAN) notification area (RNA) configuration that comprises at least one of a list of tracking area identities (IDs) or a list of RAN area IDs in response to the transitioning from the RRC_INACTIVE state to the RRC_IDLE state. The acceptable cell fulfills a minimum set of requirements to initiate an emergency call and to receive one or more Earthquake & Tsunami Warning System (ETWS) and Commercial Mobile Alert System (CMAS) notifications. The suitable cell provides normal services. The acceptable cell provides limited services.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: March 19, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Mei-Ju Shih, Yung-Lan Tseng, Hung-Chen Chen, Chie-Ming Chou