Patents by Inventor Hung C. Lin

Hung C. Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7194243
    Abstract: In a direct conversion receiver with zero-frequency intermediate frequency (IF) signal, the DC offset and 1/f noise of the IF signal is compensated by means of double-sampling. The first period of the doubling-sampling is a calibration phase, which stores the DC offset and the 1/f noise. The second period is a signal flow phase during which the stored DC offset and 1/f noise is connected in opposition with the IF signal to cancel the DC offset and 1/f noise.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: March 20, 2007
    Assignee: Maryland Semiconductor Inc.
    Inventors: Hung C. Lin, Weixin Kong
  • Patent number: 6812763
    Abstract: When two sine-wave signals in quadrature, the integral of the output is equal to zero. Conversely, when an in-phase signal is inputted as one multiplicand and the output is set to zero, a quadrature signal is derived from the second multiplicand automatically. Any analog multiplier can be used. Examples using differential pair and conductance multiplier have been demonstrated. The multiplier operates over a wideband, and the in phase and quadrature signals can be equalized automatically.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: November 2, 2004
    Assignee: Marylabd Semiconductor, Inc.
    Inventors: Hung C. Lin, Chiang H. Yeh
  • Patent number: 5714891
    Abstract: A multiple-valued literal circuit is implemented with resonant tunneling diodes (RTD). A number of RTD sections are connected in series with a current source. Current is tapped by a current bleeder between every two adjacent RTD sections. The current bleeders are turned on at different levels of input voltage, which is applied at the joint between the current source and the RTD sections. When the voltage reaches a certain threshold level, the current bleeder with the highest threshold voltage is turned on and taps the most current from the current source, depleting the current from other current bleeders with lower threshold voltages. Thus only one dominant current is tapped from the current source. The literal circuit can be used for multiple-valued decoders, multiplexers, demultiplexers and other multiple-valued digital systems.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: February 3, 1998
    Inventors: Hung C. Lin, Tang Hao
  • Patent number: 5572626
    Abstract: The folding V-I characteristic of a resonant tunneling diode (RTD) is utilized to generate the multiple membership functions for each antecedent. The folding characteristic of an RTD generally has a triangular shape, which corresponds to the popular membership function functions commonly in use. The amount of overlap of adjacent membership functions can be adjusted by adding or substracting a dc current to or from the RTD characteristic. The use of RTD folding characteristic to generate multiple membership functions can be used in a fuzzifier to simplify circuit implementation. A time varying membership function can be generated by sweeping the RTD with a voltage ramp. This time varying membership function can be used in the defuzzifier to obtain a crisp output.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: November 5, 1996
    Inventors: Hung C. Lin, Sen-Jung Wei, Hao Tang
  • Patent number: 5280445
    Abstract: A number of resonant tunneling diodes are connected in series with a resistor, a current source or a load device. A bit line is connected to every joint between any two devices through a switch. When properly biased, there can be (N+1).sup.m number of stable quantized operating points which are represented by a combination of m variables (of either voltage or current, where N is the number of peaks of the folding I-V characteristic and m is the number of bit lines. The m bit lines can write in (N+1).sup.m different combinations of inputs. During reading, the quantized voltage (or current) at each bit line is sensed. The number of stable states can be doubled by changing the polarity of the power supply.
    Type: Grant
    Filed: September 3, 1992
    Date of Patent: January 18, 1994
    Assignee: University of Maryland
    Inventors: Ming-Huei Shieh, Hung C. Lin
  • Patent number: 5267193
    Abstract: A memory cell for multi-valued logic utilizing bidirectional folding V-I characteristics. Two devices with bidirectional multiple folding characteristics, such as the V-I characteristics of resonant tunneling diodes, are connected in series across a power supply. Multiple stable operating points are established where the positive resistance portions the folding characteristics interesect and can be used to store multiple levels of signal. With bidirectional folding characteristics, the number of operating points can be doubled by using both a positive power supply and a negative power supply. The signal can be written in and read out at the connecting point of the two devices.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: November 30, 1993
    Assignee: University of Maryland
    Inventor: Hung C. Lin
  • Patent number: 5247298
    Abstract: A pair of n-peaked resonant tunneling diodes with series resistance are connected in series across a supply voltage to form a digitizer, which has 2n+1 stable operating points. There are n high current operating points and n+1 low current operating points, corresponding to "1" and "0" logic levels. For an n-bit analog-to-digital converter, the analog input voltage is divided into n binary-weighted fractions and applied to n digitizers, which latch the divided voltages into binary currents serving as digital output.
    Type: Grant
    Filed: March 13, 1992
    Date of Patent: September 21, 1993
    Assignee: University of Maryland
    Inventors: Sen-Jung Wei, Hung C. Lin
  • Patent number: 5237596
    Abstract: A stepping counter using resonant tunneling diodes (RTDs). The stepping counter utilizes the periodic hysteresis characteristic of a device with folding characteristics such as a RTD connected in series with a resistance. The series circuit is biased in the upper portion of the hysteresis loop through a current source in the case of a step-up counter. When a positive-going pulse is applied through a capacitor across the series RTD-resistor circuit, the operating point jumps to the next highest stable operating point in the hysteresis loop responsive to the leading edge of the pulse, but is prevented from returning to the original operating point at the trailing edge of the pulse because of the hysteresis.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: August 17, 1993
    Assignee: University of Maryland
    Inventor: Hung C. Lin
  • Patent number: 5128894
    Abstract: A memory cell for multi-value logic. Two devices with multiple peak folding characteristics, such as the V-I characteristics of resonant tunneling diodes, are connected in series across a power supply. Multiple stable operating points are established where the positive resistance portions of the respective folding voltage-current characteristics intersect and correspond to multiple quantized levels for storing information, creating a multi-valued memory cell.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: July 7, 1992
    Assignee: University of Maryland
    Inventor: Hung C. Lin
  • Patent number: 5113188
    Abstract: An analog-to-digital converter circuit is disclosed for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal. A number of devices are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks. In the illustrated embodiments, these devices are resonant tunneling diodes. For each bit to be produced, a pair of said devices are provided, each being coupled in series arrangement with a resistor. Predetermined portions of the input signal are applied to both of the series arrangements for each respective bit to be produced. Signals from both of the series arrangements are combined for each respective bit to be produced. The combined outputs respectively represent the produced binary bits.
    Type: Grant
    Filed: August 8, 1989
    Date of Patent: May 12, 1992
    Assignee: University of Maryland at College Park
    Inventors: Tai-Haur Kuo, Hung C. Lin
  • Patent number: 5033069
    Abstract: The disclosure is directed to an electronic circuit and method for counting input electrical signals. An embodiment of the method of the invention includes the following steps: providing a device having a current versus voltage characteristic with a plurality of peaks, and negative resistance regions between the peaks; generating a triggering pulse in response to each input signal to be counted, and applying said triggering pulse to the device to change the voltage across the device; and outputting the voltage across the device as an indication of the number of received input signals. The device may be a resonant tunneling diode with multiple peaks in its current versus voltage characteristic. The preferred embodiment of the method of the invention includes the step of providing a load resistance means across the device. In this embodiment, the triggering pulse is operative to change the voltage across the device to a stable operating point of the device in conjunction with the load resistance means.
    Type: Grant
    Filed: August 8, 1989
    Date of Patent: July 16, 1991
    Assignee: University of Maryland at College Park
    Inventors: Hung C. Lin, Tai-Haur Kuo
  • Patent number: 5029216
    Abstract: A multi-channel electronic visual aid device which is able to signal to the user whether sound is coming from the left or right, front or back, or both. For the plurality of channels, which may operate in pairs, the sound is picked up by a respective microphone and amplified and rectified into a DC voltage. The DC voltage is next fed to an analog to digital converter and then to a digital encoder. The binary code from the encoder is coupled into a logic circuit where the binary code is decoded to provide a plurality of output levels which are used to drive an indicator which, in turn, provides a visual indication of the sound level received. The binary codes for each pair of channels are also fed into a digital comparator.
    Type: Grant
    Filed: June 9, 1989
    Date of Patent: July 2, 1991
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics & Space Administration
    Inventors: Murzban D. Jhabvala, Hung C. Lin
  • Patent number: 4734879
    Abstract: A method of measuring the depletion layer width and electric field of a semiconductor junction or barrier with a particular impurity distribution profile in the semiconductor. With analog computation technique, a time-varying signal is used to simulate the impurity profile. Automatic generation of the constants of integration for the solution of Poisson's differential equation is achieved by adjusting pulse repetition rate or by iterative bisection method.
    Type: Grant
    Filed: September 24, 1985
    Date of Patent: March 29, 1988
    Inventors: Hung C. Lin, Hwey C. Chien
  • Patent number: 4584662
    Abstract: A method of simulating the voltage-current characteristics of a short channel metal-oxide-semiconductor field effect transistor (MOSFET) by connecting a series of incremental MOSFETs of different threshold voltages. The threshold voltages near the source and the drain are reduced due to charge sharing. The substrate of each reduced threshold voltage incremental MOSFET is connected to its source. The reduction in threshold voltage can be obtained by Schwartz-Christoffel transformation of the depletion layer edges of the charge sharing region. From these threshold voltages one can calculate the incremental channel conductances and the voltage drops.
    Type: Grant
    Filed: October 30, 1984
    Date of Patent: April 22, 1986
    Inventor: Hung C. Lin
  • Patent number: 4494069
    Abstract: A method of testing material defects utilizing photovoltaic effect. A detachable, transparent probe coated with either transparent metal or semiconductor is placed in contact with the material under test. The contact forms either a Schottky barrier or a p-n junction. A light spot scanning the material produces photo currents which is sensed. Defects cause a reduction in photo current.
    Type: Grant
    Filed: September 14, 1981
    Date of Patent: January 15, 1985
    Inventor: Hung C. Lin
  • Patent number: 4427937
    Abstract: A method of measuring the time constant of an exponential waveform using a spectrum analyzer. From the different output Fourier components, one can calculate the time constant. This method is suitable for deep level transient spectroscopy for determining the emission rate and activation energy of traps in semiconductors.
    Type: Grant
    Filed: September 25, 1981
    Date of Patent: January 24, 1984
    Inventors: Hung C. Lin, Ching D. Wang
  • Patent number: 4387439
    Abstract: Analog multiplier utilizing the square-law characteristic of MOSFET is disclosed. The product is obtained by taking the difference of squares of the sum and difference of two quantities. The square of difference can be obtained by a pair of complementary MOSFETs in series.
    Type: Grant
    Filed: January 2, 1981
    Date of Patent: June 7, 1983
    Inventor: Hung C. Lin
  • Patent number: 4156924
    Abstract: An analog multiplier for multiplying the signals derived from a charge coupled device (CCD) tap includes a balanced multiplier of a first conductivity-type and a buffer of a second conductivity-type coupled between the CCD tap and the balanced multiplier. The multiplier includes first and second transistors, the drains of which are coupled together to form an input. The buffer includes a load transistor coupled to the output of an amplifying transistor. Means are included for coupling the output of the amplifier transistor and the multiplier input.
    Type: Grant
    Filed: October 17, 1977
    Date of Patent: May 29, 1979
    Assignee: Westinghouse Electric Corp.
    Inventors: Donald R. Lampe, Hung C. Lin, Marvin H. White
  • Patent number: 4079238
    Abstract: The proposed general-purpose, fully-analog device is capable of such functions as auto-correlation, cross-correlation, convolution, transversal filters, etc. at high speeds (one megahertz typical sample rates) with no analog-to-digital or digital-to-analog conversions. The device correlates analog samples in one CCD channel against analog samples in a second CCD channel by means of balanced MOSFET's which multiply the associated voltage samples to give current products that are summed for all multipliers. The two CCD channels include unique floating-clock sensor and buffer circuits which sense the CCD charge samples without affecting the efficiency of their propagation along the CCD shift register.
    Type: Grant
    Filed: October 24, 1975
    Date of Patent: March 14, 1978
    Assignee: Westinghouse Electric Corporation
    Inventors: Donald Ross Lampe, Marvin Hart White, Hung C. Lin
  • Patent number: 4042945
    Abstract: An N-channel MOS transistor wherein two layers of different dielectric materials (e.g., silicon dioxide and silicon nitride) are used in conjunction with a P-doped silicon gate to permit the use of a higher resistivity P-type substrate. This enables a higher junction breakdown voltage and a higher threshold voltage without a reverse bias on the substrate due to an increase in the work function difference between the gate and substrate. Because of the lower concentration (i.e., higher resistivity) of the substrate, high frequency response is increased due to lower drain-source capacitance.
    Type: Grant
    Filed: July 14, 1975
    Date of Patent: August 16, 1977
    Assignee: Westinghouse Electric Corporation
    Inventors: Hung C. Lin, Marvin H. White