Abstract: A system to sense human and animal vital signs using an array of three-dimensional sensor units for remote health monitoring, including: three-dimensional sensor units each configured to sense heartbeats and respiratory pulses along x, y and z axes from any location on a surface of a mattress or other medium in which a human or animal is on, wherein each sensor outputs three analog signals representing the three dimensions being sensed; three analog-to-digital converters (ADC) corresponding to each of the three-dimensional sensor units to convert the three output analog signals to three digital signals; a micro-controller unit (MCU) configured to perform digital signal processing (DSP) on the digital signals for each ADC and to output the digitized signals; and a finite impulse response (FIR) low-pass filter (LPF) to low-pass filter each of the output digitized signals.

Abstract: A digital-versatile disk (DVD) playback-controller integrated circuit (IC) writes data to a block in an embedded memory buffer while row syndromes are being generated in parallel. The block has rows and columns. Row syndromes are generated on-the-fly as the data is written from the DVD disk to the memory buffer. Row syndrome generation thus requires no memory access cycles. Column syndrome generation is delayed until row correction is completed. Once errors in the rows identified by the row syndromes are corrected, column syndromes are generated. The bytes received from the DVD disk for the current row are accumulated into intermediate row syndromes. Received bytes are accumulated for the row until all of the row's bytes have been received and accumulated. The final accumulated row syndromes are written to the embedded memory buffer for later row error-correction.

Abstract: Synchronization (sync) marks on a digital-versatile disk (DVD) optical disk are initially detected and later used to adjust bit timing after jitter has occurred. Each DVD physical sector contains many sync marks in a predefined sequence. Each sync mark has a sync-code field that varies for the sync marks in a sector, and a fixed sync pattern that is constant for all sync marks. The first sync mark is detected at initialization by detecting a previous sequence of sync codes of sync marks that precede the first sync mark. The sequence is programmable so that one to seven sync marks are in the sequence searched for. Detection for sync marks with bit errors can still occur since a programmable number of bit errors are allowed in each sync code and in the fixed sync pattern. One of the sync codes can be missed in the sequence and detection still made, allowing tolerance of errors in the sync marks when longer sequences of sync codes are matched.

Abstract: An optical disk controller reads CD-ROM disks at high speeds that commonly produce errors. Errors in the headers that identify sectors are tolerated by the sector-search hardware. The disk-controller firmware writes a virtual target register the previous sector's header's minutes, seconds, frame (MSF), which is one less that the desired sector's MSF, or MSF-1. A physical target that precedes the virtual target is searched for. The physical target precedes the desired sector by N sectors, so that the physical target is MSF-N. When the physical target matches a header read from the disk, a good sector found flag is set. The physical target is then incremented for each new sector and compared to the virtual target. Once the physical target matches the virtual target, the following sector is buffered to the host. The raw header from the disk is stored and error corrections are made using the error correction byte following the sector's data.

Abstract: An embedded DRAM is incorporated inside a digital-versatile-disk (DVD) playback-controller integrated circuit. Data from the DVD optical disk is written to a data block in the embedded DRAM. Error correction is performed by reading the data block to generate syndromes and over-writing errors in the data block with corrections. Once the data block is corrected, it is copied or moved to a different area of the embedded memory, a host-buffer area. As the data block is moved, de-scrambling is performed to decrypt the data. The re-ordered data is stripped of overhead such as ECC bytes and written to the host-buffer area of the embedded DRAM. A checksum is generated as the data is moved, and the checksum is compared to a stored checksum to ensure that all errors were corrected. The data block in the host-buffer area is then transferred to a host. The embedded DRAM has a very wide data-access width of 16 bytes.