Patents by Inventor Hung-Chang Lai

Hung-Chang Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240159642
    Abstract: A smoke detector with an anti-insect function includes a substrate, an optical detection module, a top cover, a base and a perforated plate. The substrate has a ring shape region surrounding a central detection region, and a first block structure of the central detection region is protruded from the substrate and higher than an upper surface of the ring shape region. The optical detection module is disposed inside the central detection region. The top cover has a lateral wall. The base is disposed on the substrate and connected to the top cover to cover the optical detection module. The base has a second block structure partly overlapped with the lateral wall to form a guiding channel. The perforated plate is disposed between the lateral wall and the second block structure to prevent an insect from moving into the top cover through the guiding channel.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Yen-Chang Chu, Cheng-Nan Tsai, Chih-Ming Sun, Zhi-Hao Wu, Hung-Yu Lai
  • Publication number: 20240155845
    Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a layer stack over a substrate, where the layer stack includes alternating layers of a first dielectric material and a word line (WL) material; forming first trenches extending vertically through the layer stack; filling the first trenches, where filling the first trenches includes forming, in the first trenches, a ferroelectric material, a channel material over the ferroelectric material, and a second dielectric material over the channel material; after filling the first trenches, forming second trenches extending vertically through the layer stack, the second trenches being interleaved with the first trenches; and filling the second trenches, where filling the second trenches includes forming, in the second trenches, the ferroelectric material, the channel material over the ferroelectric material, and the second dielectric material over the channel material.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Inventors: TsuChing Yang, Hung-Chang Sun, Kuo Chang Chiang, Sheng-Chih Lai, Yu-Wei Jiang
  • Publication number: 20240114690
    Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: TsuChing Yang, Hung-Chang Sun, Kuo Chang Chiang, Sheng-Chih Lai, Yu-Wei Jiang
  • Publication number: 20240088291
    Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20100326638
    Abstract: A waste heat recycling and gain system includes a waste heat exchanging device disposed beneath a hot water supplier to collect the heat of the hot water, a primary heat exchanging device coupled between the supplier and the waste heat exchanging device to heat the hot water before supplying to the supplier, and an auxiliary heat exchanging device coupled to the waste heat exchanging device to decrease a temperature of the water before flowing into the waste heat exchanging device and to preheat a heat medium that flows through the auxiliary heat exchanging device, in order to effectively recycle or reuse the heat of the waste hot water and to save our energy.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 30, 2010
    Inventor: Hung Chang Lai
  • Publication number: 20050274958
    Abstract: Disclosed is a buffer layer within a light emitting semiconducting device. The buffer layer comprises a plurality of metallic nitride layers sequentially formed on top of a sapphire substrate. In a fabrication process of the buffer layer, an Aluminum nitride layer is first formed on the sapphire substrate by a reaction with ammonia and the sapphire substrate's surface under a high temperature. Then on top of the Aluminum nitride layer, a plurality of metallic nitride layers are formed by reactions between ammonia and metallic organic materials under a high temperature. A buffer layer constructed as such has better quality and fewer defects.
    Type: Application
    Filed: June 12, 2004
    Publication date: December 15, 2005
    Inventors: Ting-Kai Huang, Chi-Shen Lee, Hung-Chang Lai
  • Publication number: 20050274964
    Abstract: Disclosed is a light emitting diode structure including a Constructive Oxide Contact Structure contact layer. The light emitting diode structure comprises a substrate, a buffer layer formed on the substrate, a lower confinement layer formed on the buffer layer, a light emitting layer formed on the lower confinement layer, an upper confinement layer formed on the light emitting layer, a Constructive Oxide Contact Structure contact layer formed on the upper confinement layer whose conducting type can be P-type, N-type, or I-type, a first electrode, and a second electrode (transparent electrode). The transparent electrode is formed on the Constructive Oxide Contact Structure contact layer as an anode of the light emitting diode. The first electrode is formed on the lower confinement layer and is spaced apart from the light emitting layer, the upper confinement layer, the contact layer, and the transparent electrode. The first electrode is used as a cathode of the light emitting diode.
    Type: Application
    Filed: May 29, 2004
    Publication date: December 15, 2005
    Inventors: Ting-Kai Huang, Chi-Shen Lee, Hung-Chang Lai