Abstract: Structures with doping free connections and methods of fabrication are provided. An exemplary structure includes a substrate; a first region of a first conductivity type formed in the substrate; an overlying layer located over the substrate; a well region of a second conductivity type formed in the overlying layer; a conductive plug laterally adjacent to the well region and extending through the overlying layer to electrically contact with the first region; and a passivation layer located between the conductive plug and the well region.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a memory cell overlying a substrate and comprising a top electrode. A sidewall spacer structure is disposed along sidewalls of the memory cell. The sidewall spacer structure comprises a first spacer layer on the memory cell, a second spacer layer around the first spacer layer, and a third spacer layer around the second spacer layer. The second spacer layer comprises a lateral segment adjacent to a vertical segment. The lateral segment abuts the top electrode and has a top surface aligned with or disposed below a top surface of the top electrode. A first conductive structure overlies the memory cell and contacts the lateral segment and the top electrode.

Abstract: A battery cell balance circuit includes an AC/DC converter, a plurality of battery cells, a plurality of switches, an isolated DC/DC converter, a circuit switch, and a control unit. The AC/DC converter receives an AC power. The battery cells are connected in series to form a battery link. Each switch is correspondingly connected to one battery cell. The isolated DC/DC converter is coupled to the switches and coupled to the battery link in series. The circuit switch is coupled between the AC/DC converter, the isolated DC/DC converter, and the plurality of switches. The control unit provides a plurality of control signals to correspondingly control the plurality of switches and the circuit switch.