Patents by Inventor Hung-Chao Kao

Hung-Chao Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210098564
    Abstract: A method and semiconductor device including a substrate having one or more semiconductor devices. In some embodiments, the device further includes a first passivation layer disposed over the one or more semiconductor devices. The device may further include a metal-insulator-metal (MIM) capacitor structure formed over the first passivation layer. In addition, the device may further include a second passivation layer disposed over the MIM capacitor structure. In various examples, a stress-reduction feature is embedded within the second passivation layer. In some embodiments, the stress-reduction feature includes a first nitrogen-containing layer, an oxygen-containing layer disposed over the first nitrogen-containing layer, and a second nitrogen-containing layer disposed over the oxygen containing layer.
    Type: Application
    Filed: September 22, 2020
    Publication date: April 1, 2021
    Inventors: Jin-Mu YIN, Hung-Chao KAO, Hsiang-Ku SHEN, Dian-Hau CHEN, Yen-Ming CHEN
  • Publication number: 20200365683
    Abstract: The present disclosure is directed to a method of fabrication a semiconductor structure. The method includes providing a substrate and forming a bottom electrode over the substrate, wherein a terminal end of the bottom electrode has a tapered sidewall. The method also includes depositing an insulating layer over the bottom electrode and forming a top electrode over the insulating layer, wherein a terminal end of the top electrode has a vertical sidewall.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 10734474
    Abstract: A metal-insulator-metal (MIM) capacitor structure includes a semiconductor substrate and a bottom conductive layer above the semiconductor substrate. The bottom conductive layer has a slanted sidewall with respect to a top surface of the semiconductor substrate. The MIM capacitor structure further includes a top conductive layer above the bottom conductive layer. The top conductive layer has a vertical sidewall with respect to the top surface of the semiconductor substrate. The MIM capacitor structure further includes an insulating layer interposed between the bottom conductive layer and the top conductive layer. The insulating layer covers the slanted sidewall of the bottom conductive layer.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: August 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20200176557
    Abstract: Methods of forming a 3-dimensional metal-insulator-metal super high density (3D-MIM-SHD) capacitor and semiconductor device are disclosed herein. A method includes depositing a base layer of a first dielectric material over a semiconductor substrate and etching a series of recesses in the base layer. Once the series of recesses have been etched into the base layer, a series of conductive layers and dielectric layers may be deposited within the series of recesses to form a three dimensional corrugated stack of conductive layers separated by the dielectric layers. A first contact plug may be formed through a middle conductive layer of the corrugated stack and a second contact plug may be formed through a top conductive layer and a bottom conductive layer of the corrugated stack. The contact plugs electrically couple the conductive layers to one or more active devices of the semiconductor substrate.
    Type: Application
    Filed: May 1, 2019
    Publication date: June 4, 2020
    Inventors: Jin-Mu Yin, Hung-Chao Kao, Dian-Hau Chen, Hui-Chi Chen, Hsiang-Ku Shen, Yen-Ming Chen
  • Publication number: 20200035779
    Abstract: A metal-insulator-metal (MIM) capacitor structure includes a semiconductor substrate and a bottom conductive layer above the semiconductor substrate. The bottom conductive layer has a slanted sidewall with respect to a top surface of the semiconductor substrate. The MIM capacitor structure further includes a top conductive layer above the bottom conductive layer. The top conductive layer has a vertical sidewall with respect to the top surface of the semiconductor substrate. The MIM capacitor structure further includes an insulating layer interposed between the bottom conductive layer and the top conductive layer. The insulating layer covers the slanted sidewall of the bottom conductive layer.
    Type: Application
    Filed: October 10, 2018
    Publication date: January 30, 2020
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 9184334
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: November 10, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Publication number: 20140339579
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Application
    Filed: August 5, 2014
    Publication date: November 20, 2014
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Patent number: 8809899
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: August 19, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Publication number: 20140061688
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Application
    Filed: November 18, 2013
    Publication date: March 6, 2014
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Patent number: 8587018
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: November 19, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Patent number: 8519500
    Abstract: An image sensor with at least one correcting lens and a method for fabricating the same are described. The image sensor includes a substrate with an array of microlenses thereon and at least one correcting lens disposed over the substrate covering the microlens array. In the fabricating method, a substrate having formed with a microlens array thereon is provided, and then at least one correcting lens is disposed over the substrate covering the microlens array. The at least one correcting lens can, in use of the image sensor, shift the incident direction of light to a microlens in edge parts of the array of microlenses toward the normal line direction of the image sensor.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: August 27, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hung-Chao Kao, Ming-I Wang, Kuo-Yuh Yang
  • Patent number: 8493661
    Abstract: The present disclosure provides a contiguous microlens array, which consists of a plurality of touching microlenses, wherein the adjacent microlenses are connected to each other to form a contiguous microlens array and curvatures of every angle cross section of each microlens are the same. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 23, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Patent number: 8379312
    Abstract: A method of fabricating a contiguous microlens array is disclosed. First, an array of photoresist patterns is formed, wherein each photoresist pattern has a substantially circular or polygonal shape in a top view and neighboring photoresist patterns are connected with each other or close to each other. Then a reflow step is performed to heat the photoresist patterns thereby rounding a surface of each photoresist pattern and connecting the neighboring photoresist patterns that are close to each other. Finally, a fixing step is performed to fix a shape of each photoresist pattern. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: February 19, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Publication number: 20120326198
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shouli Steve HSIA, Chih-Kuang YU, Ken Wen-Chien FU, Hung-Yi KUO, Hung-Chao KAO, Ming-Feng WU, Fu-Chih YANG
  • Publication number: 20120211641
    Abstract: The present disclosure provides a contiguous microlens array, which consists of a plurality of touching microlenses, wherein the adjacent microlenses are connected to each other to form a contiguous microlens array and curvatures of every angle cross section of each microlens are the same. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Applicant: United Microelectronics Corp.
    Inventors: Yu-Tsung LIN, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Publication number: 20120205827
    Abstract: A method of fabricating a contiguous microlens array is disclosed. First, an array of photoresist patterns is formed, wherein each photoresist pattern has a substantially circular or polygonal shape in a top view and neighboring photoresist patterns are connected with each other or close to each other. Then a reflow step is performed to heat the photoresist patterns thereby rounding a surface of each photoresist pattern and connecting the neighboring photoresist patterns that are close to each other. Finally, a fixing step is performed to fix a shape of each photoresist pattern. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 16, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Patent number: 8228606
    Abstract: A contiguous microlens array including a plurality of contiguous microlenses is described. Each microlens has substantially circular contours at the heights higher than the connection sections of the microlens with neighboring microlenses, and has substantially partially circular contours at the heights on the connection sections adjacent to the neighboring microlenses. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: July 24, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Publication number: 20090174945
    Abstract: A contiguous microlens array including a plurality of contiguous microlenses is described. Each microlens has substantially circular contours at the heights higher than the connection sections of the microlens with neighboring microlenses, and has substantially partially circular contours at the heights on the connection sections adjacent to the neighboring microlenses. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 9, 2009
    Applicant: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Publication number: 20090134484
    Abstract: An image sensor with at least one correcting lens and a method for fabricating the same are described. The image sensor includes a substrate with an array of microlenses thereon and at least one correcting lens disposed over the substrate covering the microlens array. In the fabricating method, a substrate having formed with a microlens array thereon is provided, and then at least one correcting lens is disposed over the substrate covering the microlens array. The at least one correcting lens can, in use of the image sensor, shift the incident direction of light to a microlens in edge parts of the array of microlenses toward the normal line direction of the image sensor.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 28, 2009
    Applicant: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hung-Chao Kao, Ming-I Wang, Kuo-Yuh Yang