Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a memory device surrounded by a dielectric structure disposed over a substrate. The memory device includes a data storage structure disposed between a bottom electrode and a top electrode. A bottom electrode via couples the bottom electrode to a lower interconnect. A top electrode via couples the top electrode to an upper interconnect. A bottommost surface of the top electrode via is directly over the top electrode and has a first width that is smaller than a second width of a bottommost surface of the bottom electrode via.

Abstract: A fastener includes a main body and a bending body. The main body includes a protrusion section and an extension section. The extension section is connected with the protrusion section. The bending body is connected with the extension section of the main body. The bending body includes a first plate and a second plate. The first plate is connected with the extension section. The second plate is connected with the first plate. An angle is formed between the first plate and the second plate. The second plate has a first surface and a second surface which is opposite to the first surface. The first surface faces toward the main body, and the second plate has a first rib protruding from the second surface.