Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.

Abstract: The present disclosure relates to an integrated chip structure. The integrated chip structure includes a dielectric stack disposed on a substrate. The integrated chip structure further includes one or more piezoelectric ultrasonic transducers (PMUTs) and one or more capacitive ultrasonic transducers (CMUTs). The one or more PMUTs include a piezoelectric stack disposed within the dielectric stack over one or more PMUT cavities. The one or more CMUTs include electrodes disposed within the dielectric stack and separated by one or more CMUT cavities. An isolation chamber is arranged within the dielectric stack laterally between the one or more PMUTs and the one or more CMUTs. The isolation chamber vertically extends past at least a part of both the one or more PMUTs and the one or more CMUTs.

Abstract: A bonding apparatus for attaching an adhering pad to a base component includes a feeding and holding frame for feeding and holding the base component in a conveying route, a suspending carrier mounted above the conveying route, and a bonding device disposed on and movable with the suspending carrier. The bonding device has a feeding reel on which the tape assembly is disposed and from which the tape assembly is pulled and fed along a feeding route, and an attaching head which is disposed at said feeding route to divide the pulled section into an input side and an output side. When the attaching head is moved toward the input side, the adhering pad is removed from the carrier tape while attached to the base component.

Abstract: A keyboard device with a display panel including a base, a scissors feet assembly movably disposed on the base, an elastic member disposed on the base, a display panel supported by the scissors feet assembly and the elastic member, and multiple light transmittance keycaps disposed on the display panel is provided. The display panel has multiple display surfaces, multiple hollow portions, and multiple elastic portions. Each of the display surfaces is surrounded by the hollow portions, and is suspended between the hollow portions by the elastic portions. The light transmittance keycaps respectively and correspondingly cover the display surfaces.

Abstract: A method of assembling a waterproof structure includes the following operations. Connect a first input/output connector of a circuit board to a first positioning fixture. A first elastic adhesive is combined with a first rigid board. An end of the first positioning fixture away from the first input/output connector is passed out of the first rigid board, and the first input/output connector and the first elastic adhesive are separated on two sides of the first rigid board. The circuit board is arranged in the casing, wherein the first positioning fixture is inserted from the first input/output opening on the first wall inside the casing, so that the first elastic adhesive adheres the first rigid board to the first wall of the casing, and the first elastic adhesive fills a spacing between the first positioning fixture and the first input/output opening.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.

Abstract: A configuration configuring a UE to establish a connection with one or more candidate relays in preparation of switching to a target relay from one or more candidate relays. The apparatus receives, from a source relay, a candidate relay configuration, the candidate relay configuration including at least information of candidate relays. The apparatus measures a reference signal of the source relay and each of the candidate relays based on the candidate relay configuration. The apparatus establishes a connection with a subset of candidate relays. The apparatus transmits, to the source relay, a measurement report of the reference signal of the subset of candidate relays. The apparatus receives, from the source relay, a relay switch command to switch to a target relay from the subset of candidate relays.

Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.

Abstract: A semiconductor device includes an insulating layer, wherein the insulating layer has a via opening and a conductive line opening. The semiconductor device further includes a via in the via opening. The semiconductor device further includes a conductive line in the conductive line opening. The conductive line includes a first liner layer, wherein a first thickness of the first liner layer over the via is less than a second thickness of the first liner layer over the insulating layer, and a conductive fill, wherein the first liner layer surrounds the conductive fill.

Abstract: A small form-factor pluggable transceiver is coupled to a cable connector and a network device. The small form-factor pluggable transceiver includes a first connection port, a conversion unit, a transceiver unit, and a second connection port. The conversion unit includes a bandwidth indication pin, and the transceiver unit includes a detection pin. The transceiver unit operates in a normal state based on providing a first voltage level by the detection pin, and operates in an abnormal state based on providing the second voltage level by the detection pin. The bandwidth indication pin indicates that a signal source received by the first connection port is a copper cable-type signal source, and indicates that a rate of the signal source is an invalid rate. The detection pin provides the first voltage level based on the invalid rated by being coupled to a ground point.

Abstract: A method includes depositing a first dielectric layer over and along sidewalls of a first semiconductor fin and a second semiconductor fin, where the first semiconductor fin and the second semiconductor fin extend upwards from a semiconductor substrate, depositing a second dielectric layer over the first dielectric layer, depositing a third dielectric layer over the second dielectric layer, where materials of the second dielectric layer and the third dielectric layer are different, and a material of the first dielectric layer is different from the material of the second dielectric layer and recessing the first dielectric layer and the second dielectric layer to expose sidewalls of the first semiconductor fin and the second semiconductor fin and to form a dummy fin between the first semiconductor fin and the second semiconductor fin.

Abstract: A touch display device includes a reflective display module, a touch sensing layer, a light guide member, a ground shielding layer, and a first adhesive layer. The touch sensing layer is disposed on a display surface of the reflective display module, and the light guide member is disposed between the reflective display module and the touch sensing layer. The ground shielding layer is in contact with the light guide member and located between the reflective display module and the touch sensing layer. The ground shielding layer electrically connects to one of the reflective display module and the touch sensing layer to electrically connect to a ground potential through the one of the reflective display module and the touch sensing layer. The first adhesive layer is disposed between the light guide member and the reflective display module, and is located between the ground shielding layer and the reflective display module.

Abstract: A synthesis reactor including a container and a control unit is provided. The container includes an outer shell, an inner tank that is disposed in the outer shell and that cooperates with the outer shell to define an interlayer space therebetween, and a heater that is disposed in the interlayer space and that is attached directly to an outer surface of the inner tank. The control unit includes a controller that is electrically connected to the heater and that is configured to control heating temperature of the heater.

Abstract: A molding machine teaching aid includes a frame unit, a molding unit, a material supply unit, a drive unit and a monitoring unit. The molding unit includes a fixed die holder, a movable die holder, and two die kernels respectively and detachably disposed on the fixed and movable die holders. The material supply unit includes a heating module for melting a wire material, and an extruder transporting the molten material into a die cavity formed between the die kernels. The drive unit is controllable to drive movement of the movable die holder relative to the frame unit. The monitoring unit is for a user to operate to control the extruder, the heating module and the drive unit.

Abstract: A bicycle front derailleur is provided, including: a base, configured to be mounted to a bicycle frame; a linkage mechanism, including a connection portion configured to be connected with a cable, the linkage mechanism being swingably connected to the base; a chain guide, swingably connected to the linkage mechanism; and an adjustment assembly, disposed on the base, including a holder movably disposed on the base and an adjustment member, the holder being configured to be connected with a sheath for driving the cable, the adjustment member being movably disposed on the base and adjustable to drive the holder to move relative to the base.

Abstract: An example computing device comprises: a media capture device to capture media; a pin coupled to the media capture device to communicate an unlock signal to the media capture device; and a basic input/output system interconnected with the pin, wherein, to control activation of the media capture device, the basic input/output system is to: store an authentication parameter, receive, from the media capture device, an unlock request; in response to the unlock request, verify an authentication input against the authentication parameter, and in response to a successful verification, send the unlock signal to unlock the media capture device via the pin.

Abstract: Provided herein are compounds of Formula (I). The disclosure provides new compounds, compositions, and methods for treating, delaying, and/or preventing the adverse effects of proliferative diseases, such as cancers including, for example, lung cancer, breast cancer, ovarian cancer, prostate cancer, head cancer, neck cancer, head and neck cancer, or leukemia (e.g., cancer resistant to treatment by one or more microtubule-targeting agents (e.g., cancer resistant to multiple drugs associated with P-glycoprotein (P-gp) overexpression)). Provided are methods of inhibiting polymerization of a cancer cell microtubule in a subject in need thereof or a cell, tissue, or biological sample, binding ?-tubulin, inhibiting microtubule assembly and, inducing apoptosis in a cancer cell resistant to multiple drugs in a tissue, biological sample, or subject. Also provided in the present disclosure are pharmaceutical compositions, kits, and methods of using the compounds for treating any of the target diseases described herein.

Abstract: A semiconductor structure includes a first die, a second die, and an inter die via (IDV). The first die includes an interconnection structure and a CMOS device electrically connected to the interconnection structure. The second die includes a memory element including a first electrode, a ferroelectric layer on the first electrode, and a second electrode on the ferroelectric layer, wherein a peripheral region of the ferroelectric layer is exposed by and surrounding the second electrode from a top view perspective. The IDV electrically connects the interconnection structure of the first die to the memory element of the second die.

Abstract: A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.

Abstract: The present invention relates to a low-skin irritating deodorant composition. The composition comprises an effective amount of an active ingredient comprising hexamine, derivatives thereof, or a combination thereof for reducing, inhibiting or suppressing development of malodour from a body part; a buffer system for substantially neutralising topical acidity of the body part; and an anti-irritating agent in an effective amount, wherein the anti-irritating agent comprises one or more botanically derived compounds selected from a group consisting of flavonoids, alkaloids, iridoids, terpenes, phenols, or a combination thereof.