Patents by Inventor Hung-Chia Tsai

Hung-Chia Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071947
    Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
  • Patent number: 11117796
    Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 11014805
    Abstract: A method of making a semiconductor package includes bonding a carrier to a surface of the substrate, wherein the carrier is free of active devices, wherein the carrier includes a carrier bond pad on a surface of the carrier. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad, wherein the bonding of the wafer bond pad to the carrier bond pad comprises re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 25, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Hung-Chia Tsai, Lan-Lin Chao, Yuan-Chih Hsieh, Ping-Yin Liu
  • Publication number: 20200339412
    Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: July 8, 2020
    Publication date: October 29, 2020
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 10710871
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20200024129
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20200002161
    Abstract: A method of making a semiconductor package includes bonding a carrier to a surface of the substrate, wherein the carrier is free of active devices, wherein the carrier includes a carrier bond pad on a surface of the carrier. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad, wherein the bonding of the wafer bond pad to the carrier bond pad comprises re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.
    Type: Application
    Filed: August 19, 2019
    Publication date: January 2, 2020
    Inventors: Chun-wen CHENG, Hung-Chia TSAI, Lan-Lin CHAO, Yuan-Chih HSIEH, Ping-Yin LIU
  • Patent number: 10508023
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 10384933
    Abstract: A method of making a micro electromechanical system (MEMS) package includes patterning a substrate to form a MEMS section. The method further includes bonding a carrier to a surface of the substrate. The carrier is free of active devices. The carrier includes a carrier bond pad on a surface of the carrier opposite the MEMS section. The carrier bond pad is electrically connected to the MEMS section. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad. The bonding of the wafer bond pad to the carrier bond pad includes re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Hung-Chia Tsai, Lan-Lin Chao, Yuan-Chih Hsieh, Ping-Yin Liu
  • Patent number: 10155659
    Abstract: A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng, Hung-Chia Tsai, Chia-Hua Chu
  • Publication number: 20180194613
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: March 2, 2018
    Publication date: July 12, 2018
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9919914
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20180029881
    Abstract: A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 1, 2018
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng, Hung-Chia Tsai, Chia-Hua Chu
  • Publication number: 20170313581
    Abstract: A method of making a micro electromechanical system (MEMS) package includes patterning a substrate to form a MEMS section. The method further includes bonding a carrier to a surface of the substrate. The carrier is free of active devices. The carrier includes a carrier bond pad on a surface of the carrier opposite the MEMS section. The carrier bond pad is electrically connected to the MEMS section. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad. The bonding of the wafer bond pad to the carrier bond pad includes re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.
    Type: Application
    Filed: July 7, 2017
    Publication date: November 2, 2017
    Inventors: Chun-wen CHENG, Hung-Chia TSAI, Lan-Lin CHAO, Yuan-Chih HSIEH, Ping-Yin LIU
  • Patent number: 9776856
    Abstract: A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: October 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng, Hung-Chia Tsai, Chia-Hua Chu
  • Patent number: 9725310
    Abstract: A micro electromechanical system (MEMS) device includes a MEMS section attached to a substrate, and a cap bonded to a first surface of the substrate. The MEMS device further includes a carrier bonded to a second surface of the substrate opposite the first surface, wherein the carrier is free of active devices, and the cap and the carrier define a vacuum region surrounding the MEMS section. The MEMS device further includes a bond pad on a surface of the carrier opposite the MEMS section, wherein the bond pad is electrically connected to the MEMS section.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: August 8, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Hung-Chia Tsai, Lan-Lin Chao, Yuan-Chih Hsieh, Ping-Yin Liu
  • Patent number: 9617143
    Abstract: A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Publication number: 20160368762
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: May 20, 2016
    Publication date: December 22, 2016
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9469524
    Abstract: A method of forming a semiconductor device includes bonding a capping wafer and a base wafer to form a wafer package. The base wafer includes a first chip package portion, a second chip package portion, and a third chip package portion. The capping wafer includes a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is substantially aligned with a corresponding trench region of one of the first chip package portion, the second chip package portion or the third chip package portion. The method also includes removing a portion of the capping wafer to expose a first chip package portion contact, a second chip package portion contact, and a third chip package portion contact. The method further includes separating the wafer package into a first chip package configured to perform a first operation, a second chip package configured to perform a second operation, and a third chip package configured to perform a third operation.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 18, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9422153
    Abstract: An embodiment is a method for forming a microelectromechanical system (MEMS) device. The method comprises forming a MEMS structure over a first substrate, wherein the MEMS structures comprises a movable element; forming a bonding structure over the first substrate; and forming a support structure over the first substrate, wherein the support structure protrudes from the bonding structure. The method further comprises bonding the MEMS structure to a second substrate; and forming a through substrate via (TSV) on a backside of the second substrate, wherein the overlying TSV is aligned with the bonding structure and the support structure.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi Heng Tsai, Kuei-Sung Chang, Hung-Chia Tsai