Patents by Inventor Hung-Chun KUO

Hung-Chun KUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240395757
    Abstract: In an embodiment, a method includes forming a conductive feature adjacent to a substrate; treating the conductive feature with a protective material, the protective material comprising an inorganic core with an organic coating around the inorganic core, the treating the conductive feature comprising forming a protective layer over the conductive feature; and forming an encapsulant around the conductive feature and the protective layer. In another embodiment, the method further includes, before forming the encapsulant, rinsing the protective layer with water. In another embodiment, the protective layer is selectively formed over the conductive feature.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Hung-Chun Cho, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao
  • Patent number: 12156336
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: November 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chiung-Ying Kuo, Hung-Chun Kuo, Pao-Nan Lee, Jung Jui Kang, Chang Chi Lee
  • Publication number: 20240387256
    Abstract: In some implementations, one or more semiconductor processing tools may form a via within a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a ruthenium-based liner within the via. The one or more semiconductor processing tools may deposit, after depositing the ruthenium-based liner, a copper plug within the via.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Yao-Min LIU, Ming-Yuan GAO, Ming-Chou CHIANG, Shu-Cheng CHIN, Huei-Wen HSIEH, Kai-Shiang KUO, Yen-Chun LIN, Cheng-Hui WENG, Chun-Chieh LIN, Hung-Wen SU
  • Publication number: 20240363779
    Abstract: The present invention provides a photovoltaic panel packaging structure and method for the same. The packaging structure comprises a frame and a solar photovoltaic panel. The solar photovoltaic panel includes a first frame surface and a second frame surface with a receiving space and grooves formed therein. The a solar photovoltaic panel is installed in the receiving space and stacked on top of a first stop portion. The solar photovoltaic panel includes a first encapsulating layer, a second encapsulating layer. The first encapsulating layer includes a plurality of engaging strips extending along the edges of the solar photovoltaic panel, the engaging strips are respectively embedded in the corresponding grooves to hold the solar photovoltaic panel in place in the frame. Meanwhile, a third encapsulating layer extends to connect to the second frame surface. As a result, weight and thickness can be reduced while reducing multiple packaging passes and simplifying the assembly process.
    Type: Application
    Filed: July 17, 2023
    Publication date: October 31, 2024
    Inventors: Yao-Chung Hsiao, Hui-Yun Wu, Hung-Chun Wang, Yu-Sheng Kuo
  • Patent number: 12131972
    Abstract: An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: October 29, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po-Chih Pan, Hung-Chun Kuo
  • Publication number: 20240329344
    Abstract: Semiconductor packages and methods for manufacturing the semiconductor packages are provided. The semiconductor package includes a first electronic element disposed over a first substrate; a second electronic element disposed over a second substrate spaced apart from the first substrate; and a first interconnection element connected to the first electronic element and the second electronic element. The first electronic element extends beyond an edge of the first substrate. The second electronic element extends beyond an edge of the second substrate and towards the first electronic element. The first interconnection element is configured to optically transmit a signal between the first electronic element and the second electronic element.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN, Chang Chi LEE, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20240310964
    Abstract: A touch display device includes a substrate, a display element layer, a composite substrate, a touch electrode and an adhesive layer. The display element layer is disposed on the substrate. The composite substrate includes a support layer and a moisture barrier layer. The moisture barrier layer is in direct contact with and covers a surface of the support layer. The display element layer is located between the substrate and the composite substrate. A moisture transmission rate of the moisture barrier layer is less than 1×10?2 g/m2/day. The touch electrode is disposed on the composite substrate. The adhesive layer is disposed between the display element layer and the composite substrate.
    Type: Application
    Filed: November 29, 2023
    Publication date: September 19, 2024
    Applicant: E Ink Holdings Inc.
    Inventors: Chen Cheng Lin, Hung Wei Tseng, Yi Chun Kuo, Fang Chia Hu
  • Patent number: 12094770
    Abstract: In some implementations, one or more semiconductor processing tools may form a via within a substrate of a semiconductor device. The one or more semiconductor processing tools may deposit a ruthenium-based liner within the via. The one or more semiconductor processing tools may deposit, after depositing the ruthenium-based liner, a copper plug within the via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 17, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Min Liu, Ming-Yuan Gao, Ming-Chou Chiang, Shu-Cheng Chin, Huei-Wen Hsieh, Kai-Shiang Kuo, Yen-Chun Lin, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su
  • Publication number: 20240304511
    Abstract: A semiconductor package and a method of forming the same are provided. The semiconductor package includes a semiconductor die and a redistribution structure disposed on the semiconductor die. The redistribution structure includes an alignment auxiliary layer, a plurality of dielectric layers and a plurality of conductive patterns. The alignment auxiliary layer has a light transmittance for a light with a wavelength range of about 350-550 nm lower than that of one of the plurality of dielectric layers.
    Type: Application
    Filed: March 10, 2023
    Publication date: September 12, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Yu-Hsiang Hu, Hung-Jui Kuo, Po-Han Wang, Hung-Chun Cho
  • Publication number: 20240297140
    Abstract: In an embodiment, a device includes: a semiconductor die including a semiconductor material; a through via adjacent the semiconductor die, the through via including a metal; an encapsulant around the through via and the semiconductor die, the encapsulant including a polymer resin; and an adhesion layer between the encapsulant and the through via, the adhesion layer including an adhesive compound having an aromatic compound and an amino group, the amino group bonded to the polymer resin of the encapsulant, the aromatic compound bonded to the metal of the through via, the aromatic compound being chemically inert to the semiconductor material of the semiconductor die.
    Type: Application
    Filed: May 6, 2024
    Publication date: September 5, 2024
    Inventors: Hung-Chun Cho, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
  • Publication number: 20240282694
    Abstract: An electronic package is provided. The electronic package includes a power regulating component, an electronic component, and a circuit structure. The circuit structure separates the power regulating component and the electronic component. The circuit structure is configured to provide a first power to the power regulating component. The power regulating component is configured to provide a second power to the electronic component through the circuit structure.
    Type: Application
    Filed: April 30, 2024
    Publication date: August 22, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO
  • Publication number: 20240264701
    Abstract: The invention provides a touch display device and an operation method for the touch display device. The touch display device includes an integrated control circuit and a touch driver. The integrated control circuit is coupled to the touch driver. The integrated control circuit outputs a first synchronization signal to the touch driver. The touch driver outputs a touch mode signal to the integrated control circuit, so that the integrated control circuit generates a synchronization enabling signal to the touch driver according to the touch mode signal.
    Type: Application
    Filed: December 21, 2023
    Publication date: August 8, 2024
    Applicant: E Ink Holdings Inc.
    Inventors: Hung Wei Tseng, Yi Chun Kuo, Chen Cheng Lin
  • Publication number: 20240264368
    Abstract: An optoelectronic device is provided. The optoelectronic device includes a plurality of first waveguides and a plurality of second waveguides. The plurality of first waveguides are configured to receive a first plurality of optical signals. The plurality of second waveguides are configured to transmit a second plurality of optical signals. The plurality of first waveguides extend substantially along a first direction and the plurality of second waveguides extend substantially along a second direction different from and non-parallel with the first direction.
    Type: Application
    Filed: February 3, 2023
    Publication date: August 8, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN, Chang Chi LEE, Chun-Yen TING
  • Publication number: 20240243047
    Abstract: A semiconductor package includes a semiconductor component, a package body, a first RDL structure and an insulation layer. The package body surrounds the semiconductor component and has a first package surface. The first RDL structure is formed on the first package surface of the package body. The insulation layer is formed on the first RDL structure and includes an insulation body, a plurality of recessed portions and a plurality of voids, wherein the insulation body has a first insulation surface, the recessed portions are recessed with respect to the first insulation surface and form a pattern, and the voids are embedded in the insulation body.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Cho, Wei-Chih Chen, Po-Han Wang, Yu-Hsiang Hu, HUNG-JUI KUO
  • Patent number: 11991827
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: May 21, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun-Yen Ting, Pao-Nan Lee, Hung-Chun Kuo, Jung Jui Kang, Chang Chi Lee
  • Patent number: 11990385
    Abstract: An electronic device is provided. The electronic device includes an electronic component and a heat dissipation structure. The electronic component has a passive surface and a plurality of conductive vias exposed from the passive surface. The heat dissipation structure is disposed on the passive surface and configured to transmit a plurality of independent powers to the conductive vias through the passive surface.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: May 21, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Li-Chieh Hung, Hung-Chun Kuo
  • Patent number: 11973018
    Abstract: An electronic package is provided. The electronic package includes a power regulating component, an electronic component, and a circuit structure. The circuit structure separates the power regulating component and the electronic component. The circuit structure is configured to provide a first power to the power regulating component. The power regulating component is configured to provide a second power to the electronic component through the circuit structure.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: April 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chiung-Ying Kuo, Hung-Chun Kuo
  • Publication number: 20240130043
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240008184
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20230274998
    Abstract: An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 31, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-Chih PAN, Hung-Chun KUO