Patents by Inventor Hung-Chun KUO
Hung-Chun KUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973018Abstract: An electronic package is provided. The electronic package includes a power regulating component, an electronic component, and a circuit structure. The circuit structure separates the power regulating component and the electronic component. The circuit structure is configured to provide a first power to the power regulating component. The power regulating component is configured to provide a second power to the electronic component through the circuit structure.Type: GrantFiled: February 9, 2022Date of Patent: April 30, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chiung-Ying Kuo, Hung-Chun Kuo
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Patent number: 11948863Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.Type: GrantFiled: February 8, 2023Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chun Cho, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Wei-Chih Chen
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Publication number: 20240008184Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.Type: ApplicationFiled: July 1, 2022Publication date: January 4, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
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Publication number: 20230275000Abstract: An electronic device is provided. The electronic device includes an electronic component and a heat dissipation structure. The electronic component has a passive surface and a plurality of conductive vias exposed from the passive surface. The heat dissipation structure is disposed on the passive surface and configured to transmit a plurality of independent powers to the conductive vias through the passive surface.Type: ApplicationFiled: February 25, 2022Publication date: August 31, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Li-Chieh HUNG, Hung-Chun KUO
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Publication number: 20230274998Abstract: An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.Type: ApplicationFiled: February 25, 2022Publication date: August 31, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-Chih PAN, Hung-Chun KUO
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Publication number: 20230253299Abstract: An electronic package is provided. The electronic package includes an electronic component and a leadframe. The electronic component has a passive surface. The leadframe includes a first patterned part under the electronic component and configured to provide a power to the electronic component by the passive surface.Type: ApplicationFiled: February 10, 2022Publication date: August 10, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chiung-Ying KUO, Hung-Chun KUO
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Publication number: 20230253305Abstract: An electronic package is provided. The electronic package includes a power regulating component, an electronic component, and a circuit structure. The circuit structure separates the power regulating component and the electronic component. The circuit structure is configured to provide a first power to the power regulating component. The power regulating component is configured to provide a second power to the electronic component through the circuit structure.Type: ApplicationFiled: February 9, 2022Publication date: August 10, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chiung-Ying KUO, Hung-Chun KUO
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Publication number: 20230215790Abstract: An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.Type: ApplicationFiled: January 5, 2022Publication date: July 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chiung-Ying KUO, Hung-Chun KUO
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Patent number: 11328999Abstract: A semiconductor device package includes a lower-density substrate and a higher-density substrate. The higher-density substrate is attached to the lower-density substrate. The higher-density substrate has a first interconnection layer and a second interconnection layer disposed over the first interconnection layer. A thickness of the first interconnection layer is different from a thickness of the second interconnection layer.Type: GrantFiled: December 6, 2019Date of Patent: May 10, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Fu-Chen Chu, Hung-Chun Kuo, Chen-Chao Wang
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Patent number: 11232998Abstract: A semiconductor device package includes a substrate, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the substrate. The first circuit layer has a plurality of dielectric layers and a first through via penetrating the dielectric layers and electrically connected to the substrate. The second circuit layer is disposed on the first circuit layer. The second circuit layer has a plurality of dielectric layers and a second through via penetrating the dielectric layers and electrically connected to the first circuit layer.Type: GrantFiled: December 31, 2019Date of Patent: January 25, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Fong Jhong, Chen-Chao Wang, Hung-Chun Kuo
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Publication number: 20210202353Abstract: A semiconductor device package includes a substrate, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the substrate. The first circuit layer has a plurality of dielectric layers and a first through via penetrating the dielectric layers and electrically connected to the substrate. The second circuit layer is disposed on the first circuit layer. The second circuit layer has a plurality of dielectric layers and a second through via penetrating the dielectric layers and electrically connected to the first circuit layer.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming-Fong JHONG, Chen-Chao WANG, Hung-Chun KUO
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Publication number: 20210175175Abstract: A semiconductor device package includes a lower-density substrate and a higher-density substrate. The higher-density substrate is attached to the lower-density substrate. The higher-density substrate has a first interconnection layer and a second interconnection layer disposed over the first interconnection layer. A thickness of the first interconnection layer is different from a thickness of the second interconnection layer.Type: ApplicationFiled: December 6, 2019Publication date: June 10, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Fu-Chen CHU, Hung-Chun KUO, Chen-Chao WANG
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Patent number: 10014268Abstract: A semiconductor device includes a substrate main body, a plurality of first bump pads, and redistribution layer (RDL). The first bump pads are disposed adjacent to a surface of the substrate main body, each of the first bump pads has a first profile from a top view, the first profile has a first width along a first direction and a second width along a second direction perpendicular to the first direction, and the first width of the first profile is greater than the second width of the first profile. The RDL is disposed adjacent to the surface of the substrate main body, and the RDL includes a first portion disposed between two first bump pads.Type: GrantFiled: March 1, 2016Date of Patent: July 3, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun-Jun Zhuang, Hung-Chun Kuo, Chun-Chin Huang
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Publication number: 20180052281Abstract: A substrate for a semiconductor device includes a polymer material filling at least one through hole extending through the substrate. and at least one optical waveguide disposed within the through hole and extending through the polymer material. A refractive index of the optical waveguide is greater than a refractive index of the polymer material.Type: ApplicationFiled: August 16, 2016Publication date: February 22, 2018Inventors: Hung-Chun KUO, Wei Lun WANG
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Publication number: 20170256508Abstract: A semiconductor device includes a substrate main body, a plurality of first bump pads, and redistribution layer (RDL). The first bump pads are disposed adjacent to a surface of the substrate main body, each of the first bump pads has a first profile from a top view, the first profile has a first width along a first direction and a second width along a second direction perpendicular to the first direction, and the first width of the first profile is greater than the second width of the first profile. The RDL is disposed adjacent to the surface of the substrate main body, and the RDL includes a first portion disposed between two first bump pads.Type: ApplicationFiled: March 1, 2016Publication date: September 7, 2017Inventors: Chun-Jun ZHUANG, Hung-Chun KUO, Chun-Chin HUANG