Patents by Inventor Hung Hoang TRAN

Hung Hoang TRAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FLOATING-POINT UNIT WITH A FUSED MULTIPLY-ADD (FMA) ENGINE FOR GENERATING BINARY INTEGER OUTPUT OR FLOATING POINT OUTPUT BASED ON A SELECTOR
    Publication number: 20240134600
    Abstract: Provided are a floating-point unit, a system, and method for generating binary integer output or floating-point output based on a selector. A first input operand, a second input operand, a third input operand, and a result format selector value are received. The first input operand, the second input operand, and the third input operand comprise floating-point values. The first input operand, the second input operand, and the third input operand are processed to produce a final result comprising one of a binary integer value and a floating point value based on the result format selector value.
    Type: Application
    Filed: December 30, 2022
    Publication date: April 25, 2024
    Inventors: Ankur AGRAWAL, Kailash GOPALAKRISHNAN, Hung Hoang TRAN, Vijayalakshmi SRINIVASAN