Abstract: A wireless communication system transmits and receives electronic voice signals between a wireless communication device and a wireless networking device at a call bitrate stored in the wireless communication device. By using the call bitrate when transmitting and receiving call signals, the wireless communication system is able to eliminate delays in the call signals caused if the signal becomes worse.

Abstract: A mother-board includes a chipset, a switch, and first and second PCI Express X16 graphics interfaces. The switch has first and second switch circuits. The switch selectively turns on one of the first and second switch circuits according to a control signal. The first PCI Express X16 graphics interface has former eight lanes electrically connected to the chipset, and latter eight lanes selectively electrically connected to the chipset through the first switch circuit. The second PCI Express X16 graphics interface has former eight lanes selectively electrically connected to the chipset through the second switch circuit. When the first switch circuit is turned on, 16 lanes of the first PCI Express X16 graphics interface are electrically connected to the chipset. When the second switch circuit is turned on, the former eight lanes of the second PCI Express X16 graphics interface are electrically connected to the chipset.

Abstract: A mother-board includes a chipset, a switch, and first and second PCI Express X16 graphics interfaces. The switch has first and second switch circuits. The switch selectively turns on one of the first and second switch circuits according to a control signal. The first PCI Express X16 graphics interface has former eight lanes electrically connected to the chipset, and latter eight lanes selectively electrically connected to the chipset through the first switch circuit. The second PCI Express X16 graphics interface has former eight lanes selectively electrically connected to the chipset through the second switch circuit. When the first switch circuit is turned on, 16 lanes of the first PCI Express X16 graphics interface are electrically connected to the chipset. When the second switch circuit is turned on, the former eight lanes of the second PCI Express X16 graphics interface are electrically connected to the chipset.

Abstract: A mother-board includes a chipset, a switch, and first and second PCI Express X16 graphics interfaces. The switch has first and second switch circuits. The switch selectively turns on one of the first and second switch circuits according to a control signal. The first PCI Express X16 graphics interface has former eight lanes electrically connected to the chipset, and latter eight lanes selectively electrically connected to the chipset through the first switch circuit. The second PCI Express X16 graphics interface has former eight lanes selectively electrically connected to the chipset through the second switch circuit. When the first switch circuit is turned on, 16 lanes of the first PCI Express X16 graphics interface are electrically connected to the chipset. When the second switch circuit is turned on, the former eight lanes of the second PCI Express X16 graphics interface are electrically connected to the chipset.

Abstract: A method utilized in a wireless local area network (WLAN) system. The WLAN system includes a station and an access point (AP). The method includes steps of: transmitting an input value to the station by the AP; utilizing the input value to calculate an initial service set identifier (SSID) and an initial key by the station; and utilizing the initial SSID and the initial key to perform an authentication procedure by the station and the AP.

Abstract: A wireless communication system transmits and receives electronic voice signals between a wireless communication device and a wireless networking device at a call bitrate stored in the wireless communication device. By using the call bitrate when transmitting and receiving call signals, the wireless communication system is able to eliminate delays in the call signals caused if the signal becomes worse.

Abstract: A self-testing message displaying system suitable for a computer is provided. The computer has multiple hardware devices, and the basic input/output system performs a power on self-test sequence on the computer and outputs a self-testing code when one of the hardware devices is error. The self-testing message displaying system includes a mother board and a display device. The mother board having a memory is disposed in the computer, and the memory stores the device codes corresponding to the hardware devices. The display including an on screen display control device is electrically connected to the mother board and used to store the on screen display symbols corresponding to the codes of the hardware devices. The on screen display control device is capable of accessing the device codes corresponding to the self-testing codes from the memory, such that the display device displays the on screen display symbols corresponding to the device codes.

Abstract: A motherboard includes a PCI Express slot and a chipset. The PCI Express slot has four sidewalls; a topside of the PCI Express slot has a first aperture, and one of the four sidewalls has a second aperture. The first and second apertures are connected together in order to form an accommodation space for accepting an interface card. The chipset is electrically connected to the PCI Express slot. The interface card communicates with the chipset through the PCI Express slot.

Abstract: A motherboard with a switching function has a substrate, a chipset, a control signal generator, an on-board device, an extension slot, and a switching circuit module. The switching circuit module disposed on the substrate has a first terminal connected to the chipset for receiving a input signal from the chipset, a second terminal for receiving a control signal from the control signal generator, a first output circuit connected to the first on-board device, and a second output circuit connected to the first extension slot. The control signal determines a turned on state of the first switch output circuit and the second output circuit.

Abstract: A circuit board capable of indicating the temperature of hot elements thereon is disclosed. The circuit board includes a substrate, a hot element and a thermochromic material. The hot element may be a chip set or a CPU. The thermochromic material may be inorganic thermochromic materials, or organic thermochromic materials, such as polymers, liquid crystals, dyes, or combinations thereof.

Abstract: A motherboard includes a PCI Express slot and a chipset. The PCI Express slot has four sidewalls; a topside of the PCI Express slot has a first aperture, and one of the four sidewalls has a second aperture. The first and second apertures are connected together in order to form an accommodation space for accepting an interface card. The chipset is electrically connected to the PCI Express slot. The interface card communicates with the chipset through the PCI Express slot.

Abstract: A motherboard having a first transmission mode and a second transmission mode includes a chipset, a first graphic interface, a second graphic interface, a Small-Outline Dual-inside Memory Modules (SO-DIMM) connector, and an adapter. The SO-DIMM connector is connected with the chipset, the first graphic interface and the second graphic interface respectively. The adapter is electrically connected with the SO-DIMM connector, for shifting the first transmission mode and the second transmission mode. The first transmission mode is entered when the SO-DIMM connector and the adapter are electrically connected with the chipset and the first graphic interface while the second transmission mode is entered when the SO-DIMM connector and the adapter are electrically connected with the chipset, the first graphic interface and the second graphic interface.

Abstract: A mother-board includes a chipset, a switch, and first and second PCI Express X16 graphics interfaces. The switch has first and second switch circuits. The switch selectively turns on one of the first and second switch circuits according to a control signal. The first PCI Express X16 graphics interface has former eight lanes electrically connected to the chipset, and latter eight lanes selectively electrically connected to the chipset through the first switch circuit. The second PCI Express X16 graphics interface has former eight lanes selectively electrically connected to the chipset through the second switch circuit. When the first switch circuit is turned on, 16 lanes of the first PCI Express X16 graphics interface are electrically connected to the chipset. When the second switch circuit is turned on, the former eight lanes of the second PCI Express X16 graphics interface are electrically connected to the chipset.