Abstract: A chip package including a substrate, a chip and a mark is provided. The substrate has a carrying surface. A mark region is disposed on the carrying surface. The chip is disposed on the carrying surface and electrically connected to the substrate. The mark is disposed in the mark region for recording a process parameter.

Abstract: A circuit board for carrying a chip is provided. The circuit board includes a substrate, a wiring layer and a solder mask. The wiring layer including a cutting line pattern defining a cutting region is disposed on the substrate. The solder mask including a chip region, a first opening and a second opening is disposed on the substrate and the wiring layer. The chip region is disposed inside the cutting region. The chip is suitable to be disposed in the chip region, wherein the chip overlaps the chip region. The first opening and the second opening are respectively disposed outside two adjacent lateral sides of the chip region for exposing a part of the cutting line pattern. The exposed part of the cutting line pattern is used for measuring the position of the chip relative to the substrate.

Abstract: A chip package including a substrate, a chip and a mark is provided. The substrate has a carrying surface. A mark region is disposed on the carrying surface. The chip is disposed on the carrying surface and electrically connected to the substrate. The mark is disposed in the mark region for recording a process parameter.