Patents by Inventor Hung-Hsin Liang
Hung-Hsin Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9659794Abstract: An apparatus includes a susceptor, a first piping, a second piping, a liquid source, a third piping and a gas source. The susceptor is suitable for placing a wafer, and the first piping is configured to dispense a chemical to the wafer on the susceptor. The second piping communicates with the first piping. The liquid source is configured to deliver a cleaning liquid to the first piping through the second piping to wash a portion of the first piping. The third piping communicates with the first piping. The gas source is configured to flow a purge gas to the first piping through the third piping to purge the portion of the first piping.Type: GrantFiled: August 8, 2014Date of Patent: May 23, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ming-Sung Hung, Yu-Kuei Lee, Cheng-Nan Kao, Hung-Hsin Liang
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Patent number: 9508815Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.Type: GrantFiled: October 23, 2015Date of Patent: November 29, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
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Patent number: 9406525Abstract: A method includes followings operations. A semiconductor substrate is provided. A photoresist is formed on the semiconductor substrate. Dopants are inserted into the photoresist to carbonize a portion of the photoresist. An etch steam is sprayed on the semiconductor substrate and the photoresist. A hole is formed at a surface of the photoresist by the etch steam. The etch steam is flowed into the hole so as to remove a portion of the photoresist at an interface between the semiconductor substrate and the photoresist. The photoresist is decorticated from the semiconductor substrate.Type: GrantFiled: November 15, 2013Date of Patent: August 2, 2016Assignee: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Pei-Wen Chi, Hsueh-Chin Lu, Shin Hsien Liao, Hung-Hsin Liang
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Publication number: 20160056255Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.Type: ApplicationFiled: October 23, 2015Publication date: February 25, 2016Inventors: Fu-An LI, Cheng-Chun TSAI, Ting-Hsien CHEN, Mu-Kai TUNG, Ben-Zu WANG, Po-Jen SHIH, Hung-Hsin LIANG
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Publication number: 20160040286Abstract: An apparatus includes a susceptor, a first piping, a second piping, a liquid source, a third piping and a gas source. The susceptor is suitable for placing a wafer, and the first piping is configured to dispense a chemical to the wafer on the susceptor. The second piping communicates with the first piping. The liquid source is configured to deliver a cleaning liquid to the first piping through the second piping to wash a portion of the first piping. The third piping communicates with the first piping. The gas source is configured to flow a purge gas to the first piping through the third piping to purge the portion of the first piping.Type: ApplicationFiled: August 8, 2014Publication date: February 11, 2016Inventors: Ming-Sung HUNG, Yu-Kuei LEE, Cheng-Nan KAO, Hung-Hsin LIANG
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Patent number: 9202809Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.Type: GrantFiled: February 6, 2014Date of Patent: December 1, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
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Publication number: 20150221640Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.Type: ApplicationFiled: February 6, 2014Publication date: August 6, 2015Applicant: Taiwan Semiconductor Manufacturing CO., LTD.Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
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Publication number: 20150140829Abstract: A method includes followings operations. A semiconductor substrate is provided. A photoresist is formed on the semiconductor substrate. Dopants are inserted into the photoresist to carbonize a portion of the photoresist. An etch steam is sprayed on the semiconductor substrate and the photoresist. A hole is formed at a surface of the photoresist by the etch steam. The etch steam is flowed into the hole so as to remove a portion of the photoresist at an interface between the semiconductor substrate and the photoresist. The photoresist is decorticated from the semiconductor substrate.Type: ApplicationFiled: November 15, 2013Publication date: May 21, 2015Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: PEI-WEN CHI, HSUEH-CHIN LU, SHIN HSIEN LIAO, HUNG-HSIN LIANG
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Patent number: 6776850Abstract: A preventive maintenance tool which may be installed on a metal chemical vapor deposition (CVD) chamber to prevent escape of contaminating and toxic gases from the chamber interior during preventative maintenance (PM) cleaning of the chamber. The tool comprises a cylindrical tool body which fits to the lid O-ring of the chamber to form a gas-tight seal therewith; a vacuum line connector nipple extending from the body for connection to a vacuum line; and a lid panel rotatably mounted in the body and fitted with a pair of hinged closing panels for reversibly sealing the chamber and facilitating chamber cleaning.Type: GrantFiled: June 8, 2002Date of Patent: August 17, 2004Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Miao-Cheng Liao, Ying-Lang Wang, Hung-Hsin Liang, Hsiang-Sheng Cheng, Sheng-Te Shu, Chih-Yuan Yang
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Publication number: 20030228751Abstract: A preventative maintenance tool which may be installed on a metal chemical vapor deposition (CVD) chamber to prevent escape of contaminating and toxic gases from the chamber interior during preventative maintenance (PM) cleaning of the chamber. The tool comprises a cylindrical tool body which fits to the lid O-ring of the chamber to form a gas-tight seal therewith; a vacuum line connector nipple extending from the body for connection to a vacuum line; and a lid panel rotatably mounted in the body and fitted with a pair of hinged closing panels for reversibly sealing the chamber and facilitating chamber cleaning.Type: ApplicationFiled: June 8, 2002Publication date: December 11, 2003Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Miao-Cheng Liao, Ying-Lang Wang, Hung-Hsin Liang, Hsiang-Sheng Cheng, Sheng-Te Shu, Chih-Yuan Yang