Abstract: Disclosed herein are related to an integrated circuit to regulate a supply voltage. In one aspect, the integrated circuit includes a metal rail including a first point, at which a first functional circuit is connected, and a second point, at which a second functional circuit is connected. In one aspect, the integrate circuit includes a voltage regulator coupled between the first point of the metal rail and the second point of the metal rail. In one aspect, the voltage regulator senses a voltage at the second point of the metal rail and adjusts a supply voltage at the first point of the metal rail, according to the sensed voltage at the second point of the metal rail.

Abstract: A semiconductor device includes a first memory array, a first bit line, a second memory array, a second bit line, a first conductive line and a first control circuit. The first bit line crosses over and is coupled to the first memory array, and extends along a first direction. The second bit line crosses over the second memory array, and is coupled to the first bit line. The first conductive line crosses over the second memory array and a part of the first memory array, and is configured to operate as a part of a first capacitor. The first control circuit is configured to couple the first conductive line to the second bit line when the first memory array is written.

Abstract: A write assist circuit can include a control circuit and a voltage generator. The control circuit can be configured to receive memory address information associated with a memory write operation for memory cells. The voltage generator can be configured to provide a reference voltage to one or more bitlines coupled to the memory cells. The voltage generator can include two capacitive elements, where during the memory write operation, (i) one of the capacitive elements can be configured to couple the reference voltage to a first negative voltage, and (ii) based on the memory address information, both capacitive elements can be configured to cumulatively couple the reference voltage to a second negative voltage that is lower than the first negative voltage.

Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.

Abstract: A semiconductor device includes a first memory bank, a second memory bank and a first write driver. The first memory bank is coupled to a plurality of first data lines, and configured to operate according to a first data signal. The second memory bank is configured to operate according to the first data signal. The first write driver is disposed between the first memory bank and the second memory bank, and configured to adjust a voltage level of one of the plurality of first data lines when the first memory bank is written according to the first data signal.

Abstract: An optical forwarding device includes a specific optical connector and an optical forwarding module. The optical forwarding module includes first and second optical connectors, first and second wavelength division multiplexers (WDM), and an optical circulator. The first WDM receives and forwards a first optical signal from the first optical connector. The optical circulator includes first, second, and third ports. The first port forwards the first optical signal from the first WDM. The second port forwards the first optical signal from the first port to the optical cable through the specific optical connector, and receives and forwards a second optical signal from the optical cable. The first and second optical signals have a first wavelength. The third port receives and forwards the second optical signal from the second port. The second WDM receives the second optical signal from the third port and sends the same to the second optical connector.

Abstract: An optical forwarding device includes a specific optical connector and an optical forwarding module. The optical forwarding module includes first and second optical connectors, first and second wavelength division multiplexers (WDM), and an optical circulator. The first WDM receives and forwards a first optical signal from the first optical connector. The optical circulator includes first, second, and third ports. The first port forwards the first optical signal from the first WDM. The second port forwards the first optical signal from the first port to the optical cable through the specific optical connector, and receives and forwards a second optical signal from the optical cable. The first and second optical signals have a first wavelength. The third port receives and forwards the second optical signal from the second port. The second WDM receives the second optical signal from the third port and sends the same to the second optical connector.

Abstract: An optical duplexer adapted to convert dual fiber bidirectional transmission into single fiber bidirectional wavelength or wavelength group transmission is provided. The optical duplexer includes an optical circulator, a first male fiber connector, a second female fiber connector, and a third male fiber connector. The optical circulator includes a first port, a second port, and a third port. The first port receives a first light signal. The second port transmits the first light signal and receives a second light signal. The third port transmits the second light signal. The first male fiber connector couples to the first port. The second female fiber connector couples to the second port. The third male fiber connector couples to the third port.

Abstract: An integrated circuit having compact high-speed bus lines consists of VCSEL Array providing optical fiber holes, PIN Array providing optical fiber holes, and multi-mode optical fiber with great diameter optical core, wherein the VCSEL Array providing optical fiber holes and the PIN Array providing optical fiber holes both utilize the microelectromechanical system (MEMC) technology to form optical fiber holes as a concentric cylinder shape with diameter 100 ?m, height 30 ?m and diameter 130 ?m, height 80-100 ?m in the VCSEL light emitting area and the PIN light receiving area, respectively. An integrated package can be easily accomplished by mechanically performing focusing package of fixed optic-insertion to complete a glued integrated package, and thereby the package cost as a majority of the prime cost can be greatly reduced.

Abstract: An all optical transparent network is arranged such that each optical communication port can simultaneously and independently broadcast optical signals to, and receive optical signals from, any or all other optical communication ports on the network, and such that optical communications ports can arbitrarily and conveniently be added at distributed locations. The optical network constructed of paired 2×2 optical couplers that are cross-connected in a unique manner to form twin couplers, and/or N×N star couplers having at least one paired receiving and transmitting port such that each of the N communication ports communicates directly with each of the other communication ports.