Abstract: A control circuit for a main switch is provided. The control circuit includes an output voltage tracker, a main switch bias generator, and a reference current device. The output voltage tracker is coupled to the main output end and generates a first tracking voltage positively correlated to an output voltage. The main switch bias generator, in response to the first tracking voltage, generates a second tracking voltage substantially equal to the output voltage. The reference current device is coupled to the main switch bias generator and is used to generate a control voltage on a main control end. The reference current device is used to limit the maximum value of the output current. The main switch and a duplicating switching element of the main switch bias generator form a current mirror configuration circuit. The consuming current of the output voltage tracker is positively correlated to the output current.

Abstract: A control circuit for a main switch is provided. The control circuit includes an output voltage tracker, a main switch bias generator, and a reference current device. The output voltage tracker is coupled to the main output end and generates a first tracking voltage positively correlated to an output voltage. The main switch bias generator, in response to the first tracking voltage, generates a second tracking voltage substantially equal to the output voltage. The reference current device is coupled to the main switch bias generator and is used to generate a control voltage on a main control end. The reference current device is used to limit the maximum value of the output current. The main switch and a duplicating switching element of the main switch bias generator form a current mirror configuration circuit. The consuming current of the output voltage tracker is positively correlated to the output current.

Abstract: An electronic circuit is provided. An error amplifier comprises a first input terminal coupled to a reference voltage, a second input terminal coupled to a feedback voltage, and a transistor comprises a first terminal coupled to an input voltage, a control terminal coupled to an output terminal of the error amplifier and a second terminal outputting an output voltage. A switching-capacitor circuit is coupled between the output voltage and the error amplifier and comprises a plurality of switching elements and at least first and second capacitors. The switching elements are switched by non-overlapping clocks such that the second capacitor is discharged to a bias voltage during a first period, and the first and second capacitors are connected together during a second period thereby extracting a division voltage from the output voltage to serve as the feedback voltage.

Abstract: A controller chip for controlling a motor device includes a first input port, a first output port, a controller, and a signal processing circuit. The first input port is arranged to receive a motor control input. The first output port is arranged to generate a motor control output. The controller is arranged to generate an output signal according to an input signal, and has a second input port for receiving the input signal and a second output port for outputting the output signal. The input signal is derived from the motor control input, and the motor control output is derived from the output signal. The signal processing circuit has a target interconnection configuration selected from a plurality of candidate interconnection configurations each including an interconnection between the first input port and the second input port and an interconnection between the first output port and the second output port.

Abstract: A method and an apparatus for evaluating weighting of elements of a DAC and a SAR ADC using the same are provided. An equivalent weighting of each composed element is obtained by adding a reference element with a reference weighting, an auxiliary DAC, and a search circuit into the SAR ADC, and the equivalent weighting is represented by the reference weighting. The SAR ADC can calculate and then obtain a correct digital output by using the calibrated equivalent weighting and the successive approximation result of each input signal. The present disclosure prevents the necessity of matching each composed element of the DAC in the SAR ADC.

Abstract: A method and an apparatus for evaluating weighting of elements of a DAC and a SAR ADC using the same are provided. An equivalent weighting of each composed element is obtained by adding a reference element with a reference weighting, an auxiliary DAC, and a search circuit into the SAR ADC, and the equivalent weighting is represented by the reference weighting. The SAR ADC can calculate and then obtain a correct digital output by using the calibrated equivalent weighting and the successive approximation result of each input signal. The present disclosure prevents the necessity of matching each composed element of the DAC in the SAR ADC.

Abstract: A controller chip for controlling a motor device includes a first input port, a first output port, a controller, and a signal processing circuit. The first input port is arranged to receive a motor control input. The first output port is arranged to generate a motor control output. The controller is arranged to generate an output signal according to an input signal, and has a second input port for receiving the input signal and a second output port for outputting the output signal. The input signal is derived from the motor control input, and the motor control output is derived from the output signal. The signal processing circuit has a target interconnection configuration selected from a plurality of candidate interconnection configurations each including an interconnection between the first input port and the second input port and an interconnection between the first output port and the second output port.

Abstract: A touch screen digitizing system comprising a touch screen unit and an analog to digital converter. The touch screen unit includes a first resistive sheet with opposing first and second terminals and a second resistive sheet with opposing third and fourth terminals. The first and second resistive sheets are alternatively energized through the first, second, third, and fourth terminals. The analog to digital converter has an input coupled to the third terminal when the first resistive sheet is energized and the second resistive sheet is not, and coupled to the first terminal when the second resistive sheet is energized and the first resistive sheet is not, a first reference terminal dynamically coupled to a first reference voltage, a second reference terminal dynamically coupled to the second reference voltage, and an output terminal providing digital output data.

Abstract: A DC-coupled audio out unit is provided, including at least one regulator and at least one audio amplifier. The regulator is coupled to at least one power terminal of the audio amplifier.

Abstract: Voltage regulators are provided. In one embodiment of the voltage regulators, a differential amplifier receives a reference voltage and a feedback voltage, to generate a control signal according to a voltage difference between the feedback voltage and the reference voltage. An output transistor has a first terminal coupled to a power voltage, a control terminal coupled to the differential amplifier for receiving the control signal, and a second terminal coupled to an output terminal. A voltage feedback circuit is coupled between the output terminal and a ground voltage to generate the feedback voltage. A discharge transistor has a first terminal coupled to the ground voltage, a control terminal coupled to a first control signal, and a second terminal coupled to the output terminal through a first resistor in the voltage feedback circuit.

Abstract: An electronic circuit is provided. An error amplifier comprises a first input terminal coupled to a reference voltage, a second input terminal coupled to a feedback voltage, and a transistor comprises a first terminal coupled to an input voltage, a control terminal coupled to an output terminal of the error amplifier and a second terminal outputting an output voltage. A switching-capacitor circuit is coupled between the output voltage and the error amplifier and comprises a plurality of switching elements and at least first and second capacitors. The switching elements are switched by non-overlapping clocks such that the second capacitor is discharged to a bias voltage during a first period, and the first and second capacitors are connected together during a second period thereby extracting a division voltage from the output voltage to serve as the feedback voltage.

Abstract: A DC-coupled audio out unit is provided, including at least one regulator and at least one audio amplifier. The regulator is coupled to at least one power terminal of the audio amplifier.

Abstract: A switching regulator. A pulse width modulation (PWM) unit comprises an output stage and generates a PWM driving signal to control the output stage, such that an inductor delivers an inductor current signal to the load, and a slope compensation unit outputs a slope compensation signal with a compensation slope proportional to a falling slope of the inductor current signal to the PWM unit according to the inductor current signal.

Abstract: Voltage regulators are provided. In one embodiment of the voltage regulators, a differential amplifier receives a reference voltage and a feedback voltage, to generate a control signal according to a voltage difference between the feedback voltage and the reference voltage. An output transistor has a first terminal coupled to a power voltage, a control terminal coupled to the differential amplifier for receiving the control signal, and a second terminal coupled to an output terminal. A voltage feedback circuit is coupled between the output terminal and a ground voltage to generate the feedback voltage. A discharge transistor has a first terminal coupled to the ground voltage, a control terminal coupled to a first control signal, and a second terminal coupled to the output terminal through a first resistor in the voltage feedback circuit.

Abstract: A capacitor array comprising a plurality of unit capacitors, each having first and second electrode plates. The first electrode plates are commonly connected via first routings. The second electrode plates are grouped and connected to a plurality of nodes via second routings. The second routings connected to one node and another do not overlap in the capacitor array. The second electrode plates connected to the same node conglomerate as a group and no second electrode plate connected to another node is located in the group.

Abstract: A voltage regulating circuit for providing a regulated output voltage. The voltage regulating circuit includes a voltage regulator, a converting circuit, a capacitive device, a first current mirror module, and a second current mirror module. The voltage regulator has a first output producing the regulated output voltage and a second output producing a pass voltage. The converting circuit converts the pass voltage into a first current and a second current passing through a first converting node and a second converting node respectively, where the first current charges/discharges the capacitive device. The first current mirror module has a first current mirror path coupled to the first converting node and a second current mirror path coupled to the second converting node. The second current mirror module has a first current mirror path coupled to the second converting node and a second current mirror path coupled to the first output.

Abstract: A voltage regulating circuit for providing a regulated output voltage. The voltage regulating circuit includes a voltage regulator, a converting circuit, a capacitive device, a first current mirror module, and a second current mirror module. The voltage regulator has a first output producing the regulated output voltage and a second output producing a pass voltage. The converting circuit converts the pass voltage into a first current and a second current passing through a first converting node and a second converting node respectively, where the first current charges/discharges the capacitive device. The first current mirror module has a first current mirror path coupled to the first converting node and a second current mirror path coupled to the second converting node. The second current mirror module has a first current mirror path coupled to the second converting node and a second current mirror path coupled to the first output.

Abstract: A programmable/tunable active low-pass filter at least has the resistors, capacitors and shunt control means. It uses the resistor ladder that is structured with various fixed resistors to implement the shunt control means. The cut-off frequency of a filter is associated with the time constant, which is determined by equivalent resistance and equivalent capacitance value in the filter circuit; therefore, the filter of the present invention allowed users to fine tune the cut-off frequency linearly through the shunt control means when the variation of the environment or process parameters of manufacture cause the cut-off frequency drift, thus, the cut-off frequency can be kept in a constant value. The present invention also provides a means for programming the cut-off frequency to a desirous frequency value dependent upon the conditions of application within a big range. Thus, it can be used in many purposes widely with the same filter circuit.

Abstract: A Miller-compensated amplifier, having an amplifier input and an amplifier output, comprises a first gain stage, a second gain stage, a third gain stage, and a capacitor. The first gain stage has the amplifier input as a first gain stage input thereto and a first gain stage output. The second gain stage has a second gain stage input, coupled to the first gain stage output, and a second gain stage output. The third gain stage has a third gain stage input, coupled to the second gain stage output, and provides an output voltage at the amplifier output. The capacitor is coupled between the amplifier output and the second gain stage input. The second gain stage amplifies a small signal part of a current received thereby and leaves a DC component thereof substantially the same.

Abstract: A voltage regulator circuit for providing a substantially constant output voltage is disclosed. The voltage regulator circuit has a voltage regulator, a current sensing and comparing circuit, a capacitive load circuit, and a control circuit. The voltage regulator generates an output current in response to a control signal to provide the output voltage. The current sensing and comparing circuit senses the output current and outputs a result signal according to a sensed output current and a predetermined current value. The control circuit generates the control signal according to the comparison result to limit the output current. The capacitive load circuit provides the control circuit with a first capacitance when the voltage regulator circuit changes from a first mode to a second mode and provides the control circuit with a second capacitance when the voltage regulator circuit changes from the second mode to the first mode.