Patents by Inventor Hung-I Liu

Hung-I Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966546
    Abstract: A display device includes a base layer, a touch sensing layer, a light guide module and a display panel. The touch sensing layer is disposed on the base layer. The light guide module is disposed on the touch sensing layer. The touch sensing layer is located between the light guide module and the display panel, and the touch sensing layer and one of the light guide module and the display panel have no adhesive material therebetween.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: April 23, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Chen-Cheng Lin, Chia-I Liu, Kun-Hsien Lee, Hung-Wei Tseng
  • Patent number: 10559534
    Abstract: A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: February 11, 2020
    Assignees: Industrial Technology Research Institute, First Hi-tec Enterprise Co., Ltd., NEXCOM International Co., Ltd.
    Inventors: Sheng-Che Hung, Min-Lin Lee, Ching-Shan Chang, Hung-I Liu
  • Publication number: 20190148300
    Abstract: A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.
    Type: Application
    Filed: August 2, 2018
    Publication date: May 16, 2019
    Applicants: Industrial Technology Research Institute, First Hi-tec Enterprise Co.,Ltd., NEXCOM International Co., Ltd.
    Inventors: Sheng-Che Hung, Min-Lin Lee, Ching-Shan Chang, Hung-I Liu
  • Patent number: 10129974
    Abstract: A multi-layer circuit structure includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 13, 2018
    Assignees: Industrial Technology Research Institute, First Hi-tec Enterprise Co., Ltd., NEXCOM International Co., Ltd.
    Inventors: Chien-Min Hsu, Min-Lin Lee, Huey-Ru Chang, Hung-I Liu, Ching-shan Chang
  • Publication number: 20170273174
    Abstract: A multi-layer circuit structure includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones.
    Type: Application
    Filed: August 24, 2016
    Publication date: September 21, 2017
    Applicants: Industrial Technology Research Institute, First Hi-tec Enterprise Co.,Ltd., NEXCOM International Co., Ltd.
    Inventors: Chien-Min Hsu, Min-Lin Lee, Huey-Ru Chang, Hung-I Liu, Ching-shan Chang
  • Publication number: 20030046468
    Abstract: A high-density system includes a plurality of system units. Each system unit includes a backplane and a plurality of central processing unit (CPU) cards plugged into the backplane. Each backplane has a servicing input/output (I/O) bus for carrying servicing I/O data. Each central processing unit (CPU) card is plugged into the corresponding backplane and capable of accepting data from the servicing I/O bus or sending data to the servicing I/O bus. The high-density system further includes at least one cable for connecting the servicing I/O busses of the system units so as to transfer the servicing I/O data, and a servicing control system. The servicing control system includes a switching system for selectively connecting only one of the CPU cards in the high-density system to the servicing I/O bus, and an I/O interface module electrically connected to the servicing I/O bus. The I/O interface module has at least a port to which an external device may be plugged.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 6, 2003
    Inventors: Hsiang-Chan Chen, Hung-I Liu
  • Publication number: 20020124121
    Abstract: A high-density system includes a backplane, a plurality of central processing unit (CPU) cards, and a servicing control system. The backplane has a servicing input/output (I/O) bus for carrying servicing I/O data. The central processing unit (CPU) cards are plugged into the backplane and connected to the servicing I/O bus. The servicing control system includes a switching system for selectively connecting only one of the CPU cards to the servicing I/O bus, and an I/O interface module electrically connected to the servicing I/O bus. The I/O interface module comprises at least a port to which an external device may be plugged. The servicing control system selectively enables only one of the CPU cards to send servicing I/O data to the port or to receive servicing I/O data from the port.
    Type: Application
    Filed: March 5, 2001
    Publication date: September 5, 2002
    Inventors: Hsiang-Chan Chen, Hung-I Liu