Patents by Inventor Hung-Jen Huang

Hung-Jen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955298
    Abstract: A button module is provided. The button module comprises a base, a pressing part, and an elastic part. The pressing part includes a fixed end and a free end. The fixed end is pivotally connected to the base in a first axial direction. The elastic part is disposed on a side of the pressing part facing the base. The elastic part includes a first damping portion and a second damping portion selectively pressing against the base, where a hardness of the first damping portion is different from a hardness of the second damping portion.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: April 9, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Te-Wei Huang, Zih-Siang Huang, Jhih-Wei Rao, Hung-Chieh Wu, Liang-Jen Lin
  • Publication number: 20240096757
    Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Hidehiro FUJIWARA, Tze-Chiang HUANG, Hong-Chen CHENG, Yen-Huei CHEN, Hung-Jen LIAO, Jonathan Tsung-Yung CHANG, Yun-Han LEE, Lee-Chung LU
  • Patent number: 11862727
    Abstract: The invention provides a method for fabricating a fin structure for fin field effect transistor, including following steps. Providing a substrate, including a fin structure having a silicon fin and a single mask layer just on a top of the silicon fin, the single mask layer being as a top portion of the fin structure. Forming a stress buffer layer on the substrate and conformally covering over the fin structure. Performing a nitridation treatment on the stress buffer layer to have a nitride portion. Perform a flowable deposition process to form a flowable dielectric layer to cover over the fin structures. Annealing the flowable dielectric layer. Polishing the flowable dielectric layer, wherein the nitride portion of the stress buffer layer is used as a polishing stop.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: January 2, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Hao Che Feng, Hung Jen Huang, Hsin Min Han, Shih-Wei Su, Ming Shu Chiu, Pi-Hung Chuang, Wei-Hao Huang, Shao-Wei Wang, Ping Wei Huang
  • Publication number: 20230421175
    Abstract: The invention relates to a method and an apparatus for decoding a Low-Density Parity-Check (LDPC) code. The method includes the following steps, which is performed by an LDPC decoder including a variable-node calculation circuitry and a check-node calculation circuitry: A first-stage state entering when a codeword has been stored in a static random access memory (SRAM) is detected. The check-node calculation circuitry is arranged operably to perform a modulo 2 multiplication on the codeword and a parity check matrix to calculate a plurality of first syndromes in the first-stage state. A second-stage state is entered when the first syndromes indicate that the codeword obtained in the first-stage state is incorrect. The variable-node calculation circuitry is arranged operably to perform a bit flipping algorithm accordingly to generate variable nodes, and calculate second soft bits for the variable nodes in the second-stage state.
    Type: Application
    Filed: May 4, 2023
    Publication date: December 28, 2023
    Applicant: Silicon Motion, Inc.
    Inventors: Shiuan-Hao KUO, Hung-Jen HUANG
  • Publication number: 20230135072
    Abstract: The invention provides a method for fabricating a fin structure for fin field effect transistor, including following steps. Providing a substrate, including a fin structure having a silicon fin and a single mask layer just on a top of the silicon fin, the single mask layer being as a top portion of the fin structure. Forming a stress buffer layer on the substrate and conformally covering over the fin structure. Performing a nitridation treatment on the stress buffer layer to have a nitride portion. Perform a flowable deposition process to form a flowable dielectric layer to cover over the fin structures. Annealing the flowable dielectric layer. Polishing the flowable dielectric layer, wherein the nitride portion of the stress buffer layer is used as a polishing stop.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Hao Che Feng, Hung Jen Huang, Hsin Min Han, Shih-Wei Su, Ming Shu Chiu, Pi-Hung Chuang, Wei-Hao Huang, Shao-Wei Wang, Ping Wei Huang
  • Patent number: 11581438
    Abstract: The invention provides a fin structure for a fin field effect transistor, including a substrate. The substrate includes a plurality of silicon fins, wherein a top of each one of the silicon fins is a round-like shape in a cross-section view. An isolation layer is disposed on the substrate between the silicon fins at a lower portion of the silicon fins while an upper portion of the silicon fins is exposed. A stress buffer layer is disposed on a sidewall of the silicon fins between the isolation layer and the lower portion of the silicon fins. The stress buffer layer includes a nitride portion.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: February 14, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hao Che Feng, Hung Jen Huang, Hsin Min Han, Shih-Wei Su, Ming Shu Chiu, Pi-Hung Chuang, Wei-Hao Huang, Shao-Wei Wang, Ping Wei Huang
  • Patent number: 11536760
    Abstract: A testing device includes a testing socket and a reflector. The testing socket defines an accommodating space. The reflector is disposed in the accommodating space and has a plurality of reflection surfaces non-parallel with each other. The reflection surfaces define a transmission space.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: December 27, 2022
    Assignee: ASE TEST, INC.
    Inventors: Hung-Jen Huang, Yen-Chun Wang, Chen-Kuo Chu, I-Chun Liu
  • Publication number: 20220052199
    Abstract: The invention provides a fin structure for a fin field effect transistor, including a substrate. The substrate includes a plurality of silicon fins, wherein a top of each one of the silicon fins is a round-like shape in a cross-section view. An isolation layer is disposed on the substrate between the silicon fins at a lower portion of the silicon fins while an upper portion of the silicon fins is exposed. A stress buffer layer is disposed on a sidewall of the silicon fins between the isolation layer and the lower portion of the silicon fins. The stress buffer layer includes a nitride portion.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Applicant: United Microelectronics Corp.
    Inventors: Hao Che Feng, Hung Jen Huang, Hsin Min Han, Shih-Wei Su, Ming Shu Chiu, Pi-Hung Chuang, Wei-Hao Huang, Shao-Wei Wang, Ping Wei Huang
  • Patent number: 10955451
    Abstract: A testing device includes a testing socket, a first transmission medium and a second transmission medium. The testing socket defines a radiation space. The first transmission medium is disposed in the radiation space of the testing socket. The first transmission medium is configured for supporting a device under test (DUT). The second transmission medium is disposed in the radiation space of the testing socket.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 23, 2021
    Assignee: ASE TEST, INC.
    Inventors: Yen-Chun Wang, Hung-Jen Huang, Chen-Kuo Chu, I-Chun Liu
  • Publication number: 20190371916
    Abstract: A semiconductor structure having a metal gate includes a dielectric layer. The dielectric layer having a recess is disposed on a substrate, wherein the dielectric layer has a top part and a bottom part, and the tensile stress of the top part is larger than the tensile stress of the bottom part, thereby the recess having a sidewall profile tapering from bottom to top. The present invention also provides a method of forming said semiconductor structure.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 5, 2019
    Inventors: Jing-Yi Lin, Yi-Wen Chen, Hung-Yi Wu, Ping-Wei Huang, Shao-Wei Wang, Yueh-Chi Chuang, Hung-Jen Huang, Hao-Che Feng
  • Publication number: 20190162774
    Abstract: A testing device includes a testing socket and a reflector. The testing socket defines an accommodating space. The reflector is disposed in the accommodating space and has a plurality of reflection surfaces non-parallel with each other. The reflection surfaces define a transmission space.
    Type: Application
    Filed: April 3, 2018
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Jen HUANG, Yen-Chun WANG, Chen-Kuo CHU, I-Chun LIU
  • Publication number: 20190162767
    Abstract: A testing device includes a testing socket, a first transmission medium and a second transmission medium. The testing socket defines a radiation space. The first transmission medium is disposed in the radiation space of the testing socket. The first transmission medium is configured for supporting a device under test (DUT). The second transmission medium is disposed in the radiation space of the testing socket.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 30, 2019
    Applicant: ASE TEST, INC.
    Inventors: YEN-CHUN WANG, Hung-Jen HUANG, Chen-Kuo CHU, I-Chun LIU
  • Publication number: 20130075316
    Abstract: A water pollutant processing method to adsorb, oxidize and activate water pollutants includes using an adsorbent with low oxidation number (zeolite), an activator (from industrial wastes, such as BF slags and BOF slags) and a persulfate to process polluted water and underground water. The method includes an integrated processing system including the persulfate, adsorbent with low oxidation number and iron-containing activator. The integrated processing system not only possesses an adsorbing capability, but also an oxidizing capability using transition metal such as iron on the surface of the activator. The system can not only accelerate removal of water pollutants, but also delay movement of the pollutants to further reduce threat of pollutant spreading to downstream. BF and BOF slags are industrial wastes and the present invention also provides a channel for reusing the wastes.
    Type: Application
    Filed: September 25, 2011
    Publication date: March 28, 2013
    Applicant: NATIONAL CHI NAN UNIVERSITY
    Inventors: Ku-Fan Chen, Yu-Chen Chang, Hung-Jen Huang, Ting-Yu Chen
  • Patent number: 8247004
    Abstract: The present invention provides a pharmaceutical composition for treating skin disorders, including enhancing the healing of wounds for diabetic patients. Specifically, this invention relates to the use of the extracts of Plectranthus amboinicus and Centella asiatica for improving skin disorders, including enhancing the healing of wounds for diabetic patients, and a pharmaceutical composition comprising the extracts of Plectranthus amboinicus and Centella asiatica as well as a wound dressing comprising the same. The invention also provides a method for preparing the crude extract and extract of Plectranthus amboinicus.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: August 21, 2012
    Assignee: Development Center for Biotechnology
    Inventors: Rey-Yuh Wu, Yuh-Shan Chung, Yu-Yuan Wu, Ma-Li Siu, Hung-Jen Huang, Chin-Wen Hsiao
  • Publication number: 20120009281
    Abstract: The present invention provides a pharmaceutical composition for treating skin disorders, including enhancing the healing of wounds for diabetic patients. Specifically, this invention relates to the use of the extracts of Plectranthus amboinicus and Centella asiatica for improving skin disorders, including enhancing the healing of wounds for diabetic patients, and a pharmaceutical composition comprising the extracts of Plectranthus amboinicus and Centella asiatica as well as a wound dressing comprising the same. The invention also provides a method for preparing the crude extract and extract of Plectranthus amboinicus.
    Type: Application
    Filed: June 15, 2011
    Publication date: January 12, 2012
    Inventors: Rey-Yuh WU, Yuh-Shan Chung, Yu-Yuan Wu, Ma-Li Siu, Hung-Jen Huang, Chin-Wen Hsiao
  • Patent number: 7985431
    Abstract: The present invention provides a pharmaceutical composition for treating skin disorders, including enhancing the healing of wounds for diabetic patients. Specifically, this invention relates to the use of the extracts of Plectranthus amboinicus and Centella asiatica for improving skin disorders, including enhancing the healing of wounds for diabetic patients, and a pharmaceutical composition comprising the extracts of Plectranthus amboinicus and Centella asiatica as well as a wound dressing comprising the same. The invention also provides a method for preparing the crude extract and extract of Plectranthus amboinicus.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: July 26, 2011
    Assignee: Development Center for Biotechnology
    Inventors: Rey-Yuh Wu, Yuh-Shan Chung, Yu-Yuan Wu, Ma-Li Siu, Hung-Jen Huang, Chin-Wen Hsiao
  • Patent number: 7580615
    Abstract: The mechanism of a sub-picture processing method for displaying multiple subtitles in a video/audio playing apparatus is provided. The purpose for displaying multiple subtitles in different languages simultaneously can be achieved under a user's control. Due to the unique control procedures and the concept of time division multiplexing, the present invention only employs a single sub-picture decoding unit and a single image mixer to display multiple subtitles in different languages at any preferred positions of the main picture.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: August 25, 2009
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Hung-Jen Huang, Hsin-Ting Lin, Chao-Yung Liu
  • Patent number: 7312832
    Abstract: A sub-picture image decoder is disclosed, which essentially uses a sub-picture buffering unit to temporarily store at least one sub-picture data, an adjustment unit to store plural types of adjusting parameters, a control unit to compare the sub-picture data with the sub-picture display formats stored in a look-up table. The control unit receives adjusting signal generated by an input unit to retrieve corresponding adjusting parameter and adjust the corresponding sub-picture image for display according to the adjusting parameter.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: December 25, 2007
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Hung-Jen Huang, Wen-Kuan Chen
  • Publication number: 20070237841
    Abstract: The present invention provides a pharmaceutical composition for treating skin disorders, including enhancing the healing of wounds for diabetic patients. Specifically, this invention relates to the use of the extracts of Plectranthus amboinicus and Centella asiatica for improving skin disorders, including enhancing the healing of wounds for diabetic patients, and a pharmaceutical composition comprising the extracts of Plectranthus amboinicus and Centella asiatica as well as a wound dressing comprising the same. The invention also provides a method for preparing the crude extract and extract of Plectranthus amboinicus.
    Type: Application
    Filed: November 28, 2006
    Publication date: October 11, 2007
    Inventors: Rey-Yuh Wu, Yuh-Shan Chung, Yu-Yuan Wu, Ma-Li Siu, Hung-Jen Huang, Chin-Wen Hsiao
  • Publication number: 20070055164
    Abstract: A physiological status monitoring method is disclosed, which comprises the steps of: monitoring physiological status of at least an individual stationed inside a transportation means for acquiring a physiological data of the individual; transmitting the physiological data to a center processing device; and processing an operation of analysis and comparison upon the received physiological data by the center processing device. Moreover, with respect to the aforesaid method, a physiological status monitoring system can be provided to be installed inside a transportation means, which comprises: at least a bio sensor, capable of monitoring and sensing a physiological status of at least an individual stationed inside the transportation means for generating a sensing signal; and a center processing device, arranged inside the transportation means for receiving the sensing signal and thus evaluating the physiological caodition of the monitored individual inside the transportation means.
    Type: Application
    Filed: November 4, 2005
    Publication date: March 8, 2007
    Inventors: Hung-Jen Huang, Shao-Wei Chung, Chie-Chung Kuo, Hsin-Teng Lin