Patents by Inventor Hung-Kai WANG

Hung-Kai WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12262646
    Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.
    Type: Grant
    Filed: December 25, 2023
    Date of Patent: March 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Ju-Chun Fan, Ching-Hua Hsu, Yi-Yu Lin, Hung-Yueh Chen
  • Publication number: 20250076938
    Abstract: An example computing device includes a flexible display coupled to a housing that includes a support plate having a first joint coupled to a first end of the support plate and a second joint coupled to a second end of the support plate. A slide module has a slot that guides a slide movement of the second joint along a path of movement within the slot as the support plate pivots about the first joint, where the support plate moves according to the first joint and the second joint to support at least the portion of the flexible display when the flexible display is unfolded and moves according to the first joint and the second joint to create a gap between at least a portion of the support plate and at least the portion of the flexible display when the flexible display is folded.
    Type: Application
    Filed: November 21, 2024
    Publication date: March 6, 2025
    Inventors: Shih Wei Hsiang, Po-Kai Lai, Jengn Wen Lin, Hung-Wei Wang
  • Publication number: 20250048936
    Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region, a MTJ on the MTJ region, a top electrode on the MTJ, a connecting structure on the top electrode, and a first metal interconnection on the logic region. Preferably, the first metal interconnection includes a via conductor on the substrate and a trench conductor, in which a bottom surface of the trench conductor is lower than a bottom surface of the connecting structure.
    Type: Application
    Filed: October 17, 2024
    Publication date: February 6, 2025
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Chen-Yi Weng, Jing-Yin Jhang, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20240234272
    Abstract: An electronic package is provided, in which a first electronic module and a second electronic module are stacked via a plurality of first conductive structures and a plurality of second conductive structures, and the amount of solder of the first conductive structures is greater than the amount of solder of the second conductive structures, such that the electronic package can be configured with the first conductive structures and the second conductive structures according to the degree of warpage of the electronic package, so as to effectively disperse the stress to avoid the problem of warpage.
    Type: Application
    Filed: December 12, 2022
    Publication date: July 11, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hung-Kai WANG, Yih-Jenn JIANG, Don-Son JIANG, Yu-Lung HUANG, Men-Yeh CHIANG
  • Publication number: 20240153884
    Abstract: An electronic package is provided, in which a first electronic element and a second electronic element stacked on each other are embedded in a cladding layer, a circuit structure electrically connected to the second electronic element is formed on the cladding layer, and a passive element and a package module are disposed on the circuit structure, so as to shorten the transmission distance of electrical signals between the package module and the second electronic element.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 9, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yi-Min FU, Hung-Kai WANG, Chi-Ching HO, Yih-Jenn JIANG, Yu-Po WANG
  • Publication number: 20240136263
    Abstract: An electronic package is provided, in which a first electronic module and a second electronic module are stacked via a plurality of first conductive structures and a plurality of second conductive structures, and the amount of solder of the first conductive structures is greater than the amount of solder of the second conductive structures, such that the electronic package can be configured with the first conductive structures and the second conductive structures according to the degree of warpage of the electronic package, so as to effectively disperse the stress to avoid the problem of warpage.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 25, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hung-Kai WANG, Yih-Jenn JIANG, Don-Son JIANG, Yu-Lung HUANG, Men-Yeh CHIANG
  • Publication number: 20240055402
    Abstract: An electronic package is provided, in which a stacking component and a plurality of conductive pillars are embedded in a packaging layer, and a routing structure is formed on the packaging layer, where the stacking component is formed by stacking a first electronic module and a second electronic module on each other, and a plurality of first conductive vias and a plurality of second conductive vias are served as the electrical connection paths between the first electronic module and the second electronic module, such that the transmission distance of electrical signals between a first electronic element in the first electronic module and a second electronic element in the second electronic module can be reduced.
    Type: Application
    Filed: December 8, 2022
    Publication date: February 15, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Lung-Yuan WANG, Feng KAO, Chiu-Ling CHEN, Hung-Kai WANG
  • Publication number: 20230103177
    Abstract: An air baffle structure is provided for installing a motherboard and inside a case. The case includes an opening. The air baffle structure includes a pair of brackets and an air baffle cover. The pair of brackets are fixed on the case and disposed on two sides of the opening, and the motherboard is pluggably disposed between the pair of brackets. The air baffle cover is connected to tops of the pair of brackets and straddles the pair of brackets. Therefore, the air baffle cover may effectively guide the air to pass through the motherboard to dissipate heat of the motherboard, and the quantity of fans in the case is reduced.
    Type: Application
    Filed: November 8, 2021
    Publication date: March 30, 2023
    Inventors: Long-Sing YE, Hung-Kai WANG