Patents by Inventor Hung KANG

Hung KANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163932
    Abstract: A multi-link operation (MLO) transmission method is provided. The MLO transmission method may be applied to an apparatus. The MLO transmission method may include the following steps. A plurality of station (STA) modules of the apparatus may each perform a respective backoff procedure. Each STA module may correspond to a different link. An MLO control circuit of the apparatus or a first STA module of the plurality of STA modules may determine whether to perform a synchronous transmission (TX) for a first STA module and at least one of other STA modules in response to a first backoff counter of the first STA module reaching 0.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Inventors: Hao-Hua KANG, Chih-Chun KUO, Cheng-Ying WU, Yang-Hung PENG
  • Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Publication number: 20240130614
    Abstract: An intraocular pressure inspection device includes an intraocular pressure detection unit, a high-precision positioning system and a wide-area positioning system, wherein according to the position of the intraocular pressure detection unit, a set of high-precision coordinates output by the high-precision positioning system and a set of wide-area coordinates output by the wide-area positioning system are integrated in appropriate weights to obtain a set of more precise integrated coordinate. The above-mentioned intraocular pressure inspection device can prevent the intraocular pressure detection unit from failing to operate once it is not in the working area of the high-precision positioning system.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 25, 2024
    Inventors: Shao Hung HUANG, Chao-Ting CHEN, Fong Hao KUO, Yu-Chung TUNG, Chu-Ming CHENG, Chi-Yuan KANG
  • Publication number: 20240124292
    Abstract: An auxiliary operation device for a droplet dispenser includes a droplet sensor, an imaging device and a processor. The droplet sensor has a detected area located between a droplet dispenser and a target area, wherein the droplet sensor detects a droplet output from the droplet dispenser, and outputs a corresponding droplet detection signal. The imaging device captures an image of the target area. The processor obtains a dripping time point at which the droplet passes through the detected area according to the droplet detection signal, and determines whether the target area is shielded within a first time range according to the image, so as to evaluate whether the droplet has successfully dropped into the target area. The above-mentioned auxiliary operating device of the droplet dispenser can objectively determine whether the droplets successfully drops into the target area, and improve the accuracy of judgment.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: SHAO HUNG HUANG, CHAO-TING CHEN, FONG HAO KUO, CHI-YUAN KANG, Chang Mu WU
  • Patent number: 11948939
    Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Kai-Chi Wu, Ching-Hung Kao, Meng-I Kang, Kuo-Fang Ting
  • Publication number: 20240076422
    Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
  • Patent number: 11916141
    Abstract: A method for fabricating a shield gate MOSFET includes forming an epitaxial layer having a first conductivity type, forming a plurality of trenches in the epitaxial layer, forming a first and a second doped regions in the epitaxial layer at a bottom of each of the trenches, wherein the first doped region has a second conductivity type, and the second doped region has the first conductivity type. An insulating layer and a conductive layer as a shield gate are orderly formed in each of the trenches, and a portion of the conductive layer and the insulating layer are removed to expose a portion of the epitaxial layer in the trenches. An inter-gate oxide layer and a gate oxide layer are formed in the trenches, and a control gate is formed on the inter-gate oxide layer in the plurality of trenches.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: February 27, 2024
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Hung-I Su, Chang-Chin Ho, Yong-Kang Jiang
  • Patent number: 11417532
    Abstract: The invention provides a method for reducing mismatch of semiconductor device patterns, which comprises the following steps: defining an initial lithography area which partially overlaps a target gate structure, a first gate structure and a second gate structure; if a length and a width of the target gate structure are smaller than a preset channel length and a preset channel width respectively, adjusting and reducing the area of the initial lithography area to define a second lithography area. The second lithography area partially overlaps with the target gate structure but does not overlap with the first gate structure and the second gate structure, and the second lithography region is defined as the active area.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: August 16, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Kang Lien, Wei-Cheng Hung, Yu-Jen Liu
  • Publication number: 20220199408
    Abstract: The invention provides a method for reducing mismatch of semiconductor device patterns, which comprises the following steps: defining an initial lithography area which partially overlaps a target gate structure, a first gate structure and a second gate structure; if a length and a width of the target gate structure are smaller than a preset channel length and a preset channel width respectively, adjusting and reducing the area of the initial lithography area to define a second lithography area. The second lithography area partially overlaps with the target gate structure but does not overlap with the first gate structure and the second gate structure, and the second lithography region is defined as the active area.
    Type: Application
    Filed: January 27, 2021
    Publication date: June 23, 2022
    Inventors: Hung-Kang Lien, Wei-Cheng Hung, Yu-Jen Liu
  • Patent number: 9946247
    Abstract: A system for managing real-time work information of a motor fitting provides a sensor set at the motor fitting to transmit the real-time work information to a processing module. A processing unit of the processing module sends type information and a real-time work parameter according to the real-time work information. When a detection unit determines the real-time work parameter is fallen outside a normal work parameter according to a lookup table stored in a database and the type information, the detection unit generates an abnormal-notification signal for transmission. When an application procedure of the application-processing unit is triggered, the application-processing unit activates a play unit to play the normal work parameter, and further the activated play unit plays notification information upon receiving the abnormal-notification signal.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: April 17, 2018
    Assignee: Teco Electric & Machinery Co., Ltd.
    Inventors: Chao-Kai Liu, Ji-Hung Kang, Hung-Chun Chang, Chen-Shun Hung, Chun-Hung Chen, Chien-Hung Chen
  • Publication number: 20160378095
    Abstract: A system for managing real-time work information of a motor fitting provides a sensor set at the motor fitting to transmit the real-time work information to a processing module. A processing unit of the processing module sends type information and a real-time work parameter according to the real-time work information. When a detection unit determines the real-time work parameter is fallen outside a normal work parameter according to a lookup table stored in a database and the type information, the detection unit generates an abnormal-notification signal for transmission. When an application procedure of the application-processing unit is triggered, the application-processing unit activates a play unit to play the normal work parameter, and further the activated play unit plays notification information upon receiving the abnormal-notification signal.
    Type: Application
    Filed: August 27, 2015
    Publication date: December 29, 2016
    Inventors: CHAO-KAI LIU, JI-HUNG KANG, HUNG-CHUN CHANG, CHEN-SHUN HUNG, CHUN-HUNG CHEN, CHIEN-HUNG CHEN
  • Publication number: 20140318277
    Abstract: A sampling device includes a gas guiding unit having upper and lower guiding grooves and a liquid guiding unit abutting against the gas guiding unit and having a passage groove that communicates fluidly with the upper and lower guiding grooves. The liquid guiding unit includes a liquid-retaining mechanism including a liquid-retaining net that enables liquid to form a liquid membrane through capillary action. Gas introduced into the passage groove passes through the liquid membrane where airborne components contained therein are dissolved. The liquid containing the dissolved airborne components is extracted from the sampling device as a test sample.
    Type: Application
    Filed: November 1, 2013
    Publication date: October 30, 2014
    Applicant: ATLAS TECHNOLOGY CORP.
    Inventors: Hung KANG, David LIU
  • Patent number: 8768023
    Abstract: A method for determining an axial direction of a bore of a bone fixator includes the following steps: obtaining X-ray images of the bore, calculating perpendicular bisectors, determining spatial planes, and obtaining the axial direction of the bore. After X-ray images of the bore are taken from two X-ray source positions, two overlapping images of the bore are obtained for calculating two perpendicular bisectors therein respectively. Each perpendicular bisector and its corresponding X-ray source position define one spatial plane. The intersection of the two spatial planes defines the axial direction of the bore. Now that the axial direction of the bore can be derived from only two X-ray images of the bore taken during an orthopedic surgery, radiation exposure of the patient and of the medical personnel involved can be significantly reduced.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: July 1, 2014
    Assignee: National Central University
    Inventors: Ching-Shiow Tseng, Pei-Chun Chen, Hung-Kang Wu
  • Publication number: 20140079301
    Abstract: A method for determining an axial direction of a bore of a bone fixator includes the following steps: obtaining X-ray images of the bore, calculating perpendicular bisectors, determining spatial planes, and obtaining the axial direction of the bore. After X-ray images of the bore are taken from two X-ray source positions, two overlapping images of the bore are obtained for calculating two perpendicular bisectors therein respectively. Each perpendicular bisector and its corresponding X-ray source position define one spatial plane. The intersection of the two spatial planes defines the axial direction of the bore. Now that the axial direction of the bore can be derived from only two X-ray images of the bore taken during an orthopedic surgery, radiation exposure of the patient and of the medical personnel involved can be significantly reduced.
    Type: Application
    Filed: November 16, 2012
    Publication date: March 20, 2014
    Applicant: National Central University
    Inventors: Ching-Shiow TSENG, Pei-Chun Chen, Hung-Kang Wu
  • Patent number: 8040268
    Abstract: A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: October 18, 2011
    Assignee: Mediatek Inc.
    Inventor: Tzung-Hung Kang
  • Patent number: 8031097
    Abstract: A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: October 4, 2011
    Assignee: Mediatek Inc.
    Inventors: Wei-Hsuan Tu, Tzung-Hung Kang
  • Patent number: 7994531
    Abstract: A white-light LED chip and a fabrication method thereof are provided. The white-light LED chip comprises a blue-light LED chip and a phosphor layer directly disposed on a top surface of the blue-light LED chip. The method comprises providing a plurality of blue-light LED chips attached to a substrate, wherein at least one contact pad is formed on the top surface of each blue-light LED chip. A protective layer is formed on the contact pad. A phosphor layer is formed on the top surface of the blue-light LED chip by a molding process, exposing the contact pad. Finally, the protective layer and the substrate are removed from the blue-light LED chip to form a white-light LED chip.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 9, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Chun-Chi Lin, Tzu-Han Lin, Wei-Hung Kang
  • Patent number: 7928655
    Abstract: A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a planar top surface, a light-emitting diode (LED) chip disposed over the top surface of the semiconductor substrate, at least two isolated outer wiring layers formed through the semiconductor substrate and electrically connected to the light-emitting diode chip, serving as input terminals, a transparent encapsulating layer with a substantially planar top surface formed over the semiconductor substrate, capping the LED chip and the at least two isolated outer wiring layers, and a lens module adhered to the substantially planar top surface of the transparent encapsulating layer to cap the light-emitting diode chip. In one embodiment, the lens module includes a fluorescent layer and a lens covering or covered by the fluorescent layer.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: April 19, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Tzu-Han Lin, Tzy-Ying Lin, Jui-Ping Weng, Wei-Hung Kang
  • Patent number: 7924087
    Abstract: A reference buffer circuit with high driving capability is disclosed. In which, a buffering stage has a first NMOS transistor and a first PMOS transistor to provide high and low tracking voltages respectively based on a high input voltage and a low input voltage. A first driving stage is driven by the high and low tracking voltages to output a first high output voltage and a first low output voltage. A body of the first PMOS transistor is tied to a first bias voltage lower than a supply voltage for the buffering and first driving stages.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: April 12, 2011
    Assignee: Mediatek Inc.
    Inventors: Wei-Hsuan Tu, Tzung-Hung Kang
  • Patent number: 7920328
    Abstract: A lens module and a method for fabricating the same are disclosed. The module comprises a substrate and a lens structure. The substrate comprises a through-hole therein. The lens structure is embedded in the through-hole.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: April 5, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Wei-Hung Kang, Chia-Yang Chang, Jung-Jung Kuo, Yu-Hui Lee