Patents by Inventor Hung Kuo

Hung Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12005091
    Abstract: The present invention discloses a method for maintaining or improving gastrointestinal condition, which includes: administering a lactic acid bacterial composition to a subject in need thereof, wherein the lactic acid bacterial composition comprises: a Lactobacillus paracasei ET-66 strain with a deposition number CGMCC 13514. The present invention also discloses a method for maintaining or improving gastrointestinal condition, which includes: administering a lactic acid bacterial fermentation composition to a subject in need thereof, wherein the lactic acid bacterial fermentation composition comprises: a fermentation product of a Lactobacillus paracasei ET-66 strain.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: June 11, 2024
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Hsieh-Hsun Ho, Wen-Yang Lin, Jui-Fen Chen, Yi-Wei Kuo, Jia-Hung Lin, Chi-Huei Lin, Ching-Wei Chen, Yu-Fen Huang
  • Publication number: 20240187722
    Abstract: A measurement assistance system and method are provided. The measurement assistance system includes: a measurement platform, having an operation area configured for a to-be-measured object and a measurement tool to be placed; a camera, arranged on the measurement platform and configured to obtain a measurement image; and a server module, electrically connected to the camera and configured to execute a measurement tool identification program, a measurement part identification program, and a measurement posture identification program according to the measurement image, and determine whether a measurement tool appearance image, a measurement part image, and a measurement posture image are correct. The server module has a processing unit. When the measurement tool appearance image, the measurement part image, and the measurement posture image are all correct, a measurement result is generated according to measurement data.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Inventors: CHUN-CHIH KUO, CHIA-HUNG CHANG, BO-YUN HOU, CHENG-YU YANG
  • Publication number: 20240180492
    Abstract: A signal transmitting element is used to solve the problem that an additional surgery is required to remove the conventional vascular monitoring element after completing the detecting task. The signal transmitting element comprises a body made of a specific biodegradable material. The body includes a signal sensing portion including a structure configured to sense a blood flow information of a blood vessel surrounded and contacted by the body, thereby generating a blood vessel signal; and a signal transmitting portion coupled with the signal sensing portion for receiving the blood vessel signal and including a specific structure configured to convert the blood vessel signal into a transmission signal.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 6, 2024
    Inventors: Chun-Chieh Tseng, Chun-Ming Chen, Tung-Lin Tsai, Yen-Hao Chang, Shu-Hung Huang, Sheng-Hua Wu, Yen-Hsin Kuo, Ping-Ruey Chou
  • Publication number: 20240183102
    Abstract: A window covering cutting apparatus includes a supporting base, a mounting base, a cutting device, a size positioning device, an input device, an output device, a storage device and a signal processing circuit. The signal processing circuit calculates acquired information including product information, a mounting mode, cutting size information and a position detecting value to generate adjusted position information and target position information, and displays them on the output device. The size positioning device is adjusted until the adjusted position information equals to the target position information, after which the signal processing circuit sets the cutting device to cut the window covering to the required size. Since a correct cutting position of the window covering is obtained by the calculation of the signal processing circuit, a risk of cutting the window covering to a wrong size due to miscalculation by users is reduced.
    Type: Application
    Filed: November 30, 2023
    Publication date: June 6, 2024
    Applicant: Nien Made Enterprise Co., Ltd.
    Inventors: Chao-Hung Nien, Wei-Chieh Tang, Shun-Yuan Ke, Shang-Ju Kuo
  • Publication number: 20240181545
    Abstract: A size positioning device applied to a window covering cutting apparatus includes a manual operating member, a limit assembly and a position detecting device. The limit assembly can be driven by the manual operating member to move. The position detecting device can detect a position of the limit assembly and generate a position detecting value. According to the position detecting value, a signal processing circuit of the window covering cutting apparatus generates adjusted position information and target position information, and displays the adjusted position information on an output device. The manual operating member is adjusted according to the adjusted position information to move the limit assembly until the adjusted position information equals to the target position information, after which a cutting device cuts a first end of the window covering. Thereby, a risk of cutting the window covering to a wrong size due to miscalculation by users is reduced.
    Type: Application
    Filed: November 30, 2023
    Publication date: June 6, 2024
    Applicant: Nien Made Enterprise Co., Ltd.
    Inventors: Chao-Hung Nien, Wei-Chieh Tang, Shun-Yuan Ke, Shang-Ju Kuo
  • Patent number: 11999944
    Abstract: A method for promoting growth of a probiotic microorganism includes cultivating the probiotic microorganism in a growth medium containing a fermented culture of lactic acid bacterial strains that include Lactobacillus salivarius subsp. salicinius AP-32 deposited at the China Center for Type Culture Collection (CCTCC) under CCTCC M 2011127, Lactobacillus plantarum LPL28 deposited at the China General Microbiological Culture Collection Center (CGMCC) under CGMCC 17954, Lactobacillus acidophilus TYCA06 deposited at the CGMCC under CGMCC 15210, and Bifidobacterium longum subsp. infantis BLI-02 deposited at the CGMCC under CGMCC 15212.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: June 4, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Cheng-Chi Lin, Chen-Hung Hsu, Tsai-Hsuan Yi, Yu-Wen Chu, Yi-Wei Kuo, Jui-Fen Chen, Shin-Yu Tsai
  • Patent number: 12002675
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Yu Chen, Chih-Cheng Liu, Yi-Chen Kuo, Jr-Hung Li, Tze-Liang Lee, Ming-Hui Weng, Yahru Cheng
  • Publication number: 20240179829
    Abstract: A circuit board structure includes a build-up structure, a graphene layer disposed on the build-up structure, and at least one conductive pillar disposed on the graphene layer, the graphene layer includes an oxidized area not covered by the at least one conductive pillar and a non-oxidized area covered by the at least one conductive pillar, and the at least one conductive pillar is electrically connected to the build-up structure via the non-oxidized area.
    Type: Application
    Filed: January 10, 2023
    Publication date: May 30, 2024
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventor: Chun Hung KUO
  • Patent number: 11996165
    Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: May 28, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Chi Cheng, Shyh-Bin Kuo, Yi-Cheng Lai, Chung-Hung Chen, Shih-Hsien Yang, Yu-Chih Wang, Kuo-Hsiang Chen
  • Publication number: 20240170437
    Abstract: A package structure is disclosed. The package structure includes a first substrate, a second substrate, a gap, and a directing structure. The second substrate is disposed under the first substrate. The gap is between the first substrate and the second substrate. The gap includes a first region and a second region. The first region is configured to accommodate a filling material. The directing structure is disposed in a flow path of the filling material and configured to reduce a migration of the filling material from the first region to the second region.
    Type: Application
    Filed: November 23, 2022
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun Fu KUO, Shang Min CHUANG, Ching Hung CHUANG, Hsu Feng TSENG, Jia Zhen WANG
  • Patent number: 11991837
    Abstract: A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: May 21, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Ke-Chien Li, Chun-Hung Kuo, Chih-Chun Liang
  • Publication number: 20240163932
    Abstract: A multi-link operation (MLO) transmission method is provided. The MLO transmission method may be applied to an apparatus. The MLO transmission method may include the following steps. A plurality of station (STA) modules of the apparatus may each perform a respective backoff procedure. Each STA module may correspond to a different link. An MLO control circuit of the apparatus or a first STA module of the plurality of STA modules may determine whether to perform a synchronous transmission (TX) for a first STA module and at least one of other STA modules in response to a first backoff counter of the first STA module reaching 0.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Inventors: Hao-Hua KANG, Chih-Chun KUO, Cheng-Ying WU, Yang-Hung PENG
  • Publication number: 20240162402
    Abstract: A display device includes a circuit substrate, a plurality of pad sets and a plurality of light-emitting elements. The plurality of pad sets is disposed on the circuit substrate, and each pad set includes a first pad and a second pad surrounding the first pad. The plurality of light-emitting elements is disposed above the circuit substrate, and each light-emitting element includes a first electrode, a second electrode and a light-emitting stack between the first electrode and the second electrode, wherein the first electrode is electrically connected to the first pad, the second electrode is electrically connected to the second pad, and an orthographic projection of the second electrode on the circuit substrate is overlapped with an orthographic projection of the first pad on the circuit substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo
  • Publication number: 20240162372
    Abstract: A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to the first surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed in such order in a direction from the first surface to the second surface. The active layer includes well layers and barrier layers that are alternately stacked. The active layer has an upper surface that is adjacent to the second semiconductor layer, and a lower surface that is opposite to the upper surface. The first semiconductor layer is doped with an n-type dopant, which has a first concentration of 5E17/cm3 at a first point in the first semiconductor layer. The first point of the first semiconductor layer and the lower surface of the active layer have a first distance therebetween. The first distance ranges from 150 nm to 500 nm.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Inventors: Weihuan LI, Jinghua CHEN, Huan-Shao KUO, Yu-Ren PENG, Dongpo CHEN, Chia-Hung CHANG
  • Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Patent number: 11984323
    Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chien Hou, Yu-Ting Yen, Cheng-Yu Kuo, Chih Hung Chen, William Weilun Hong, Kei-Wei Chen
  • Publication number: 20240153552
    Abstract: A memory array for computing-in-memory (CIM) is disclosed. The memory array for CIM includes a bit cell array, at least one word line and at least one bit line. The bit cell array has a plurality of bit cells, wherein each bit cell is operated at an operating voltage. The at least one word line is electrically connected to the bit cell array, wherein the at least one word line is associated with a first parameter. The at least one bit line is electrically connected to the bit cell array, wherein the bit cells extend along a specific direction, each the at least one bit line has an electrical parameter associated therewith, each the bit cell is associated with a second parameter, a first quantity of the plurality of bit cells of the bit cell array extends along the specific direction, and the memory array determines how an expansion associated with at least one of the first parameter and the second parameter is according to the specific direction.
    Type: Application
    Filed: February 28, 2023
    Publication date: May 9, 2024
    Applicant: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Tian-Sheuan Chang, Wei-Zen Chen, Shyh-Jye Jou, Shu-Hung Kuo, Shih-Hang Kao, Li-Kai Chen
  • Patent number: 11978511
    Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
  • Publication number: 20240145641
    Abstract: A color conversion panel and a display device are provided. The color conversion panel includes an opaque substrate and a sapphire substrate. The opaque substrate includes a plurality of first pixel openings, a plurality of second pixel openings and a plurality of third pixel openings. The first pixel openings are filled with red quantum dot material, and the second pixel openings are filled with green quantum dot material. The sapphire substrate is on the opaque substrate. A first surface of the sapphire substrate that faces the opaque substrate has a plurality of first arc surfaces corresponding to the first pixel openings, a plurality of second arc surfaces corresponding to the second pixel openings, and a plurality of third arc surfaces corresponding to the third pixel openings.
    Type: Application
    Filed: December 15, 2022
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Kai-Ling Liang, Wei-Hung Kuo, Hui-Tang Shen, Chun-I Wu, Suh-Fang Lin
  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen