Patents by Inventor Hung-Ling CHANG

Hung-Ling CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120325
    Abstract: A stacked package structure and a manufacturing method thereof are provided. The stacked package structure includes an upper redistribution layer, a first chip, and an upper molding layer. The first chip is disposed on the upper redistribution layer and is electrically connected to the upper redistribution layer. The upper molding layer is disposed on the first chip and the upper redistribution layer, and is configured to package the first chip. The upper molding layer includes a recess, the recess is recessed relative to a surface of the upper molding layer away from the upper redistribution layer, and the recess is circumferentially formed around a periphery of the upper molding layer.
    Type: Application
    Filed: May 31, 2023
    Publication date: April 11, 2024
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Pei-chun TSAI, Hung-hsin HSU, Shang-yu CHANG CHIEN, Chia-ling LEE
  • Publication number: 20240087961
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Ju CHOU, Chih-Chung Chang, Jun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Kao, Chen-Hsuan Liao
  • Patent number: 11923250
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Ju Chou, Chih-Chung Chang, Jiun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Gao, Chen-Hsuan Liao
  • Publication number: 20240071947
    Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
  • Publication number: 20090116239
    Abstract: A fastener includes a main body, a light guide, and a threaded securing member. The light guide is fit over the main body. The main body with the light guide thereon is fit into a mounting hole of a mounting plate and the threaded securing member engages a threaded section of the main body, whereby a top retention portion of the main body and the threaded securing member together establish abutting engagement that securely fixes the main body to the mounting hole. A light source unit is arranged in the threaded securing member and connected to a power source. Illuminators are mounted on the light source unit may give off light that is guided by the light guide to emit through a light emission portion of the light guide. Thus, the light emission portion of the main body may serve as a lighting ring for warning or indication purposes.
    Type: Application
    Filed: October 27, 2008
    Publication date: May 7, 2009
    Applicant: ITW ELECTRONIC BUSINESS ASIA CO. LTD.
    Inventors: Shi-Shan WU, Hung-Ling CHANG, Jing-Ren HU, Yu-Ren LO