Patents by Inventor Hung Luong
Hung Luong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11659300Abstract: A solid-state image sensor includes a pixel array section including a plurality of unit pixels each having a photoelectric conversion unit, the plurality of unit pixels being arranged in a matrix, a constant current source circuit unit having a constant current source connected to each of vertical signal lines provided in association with column arrangement of the pixel array section; and a control unit configured to control the constant current source circuit unit. The constant current source includes a plurality of transistors. The control unit switches, in a case where the plurality of transistors constituting the constant current source is regarded as one transistor having a gate width and a gate length being equivalent to each other, a ratio between the gate width and the gate length of the plurality of transistors on the basis of illumination in image-capturing environment.Type: GrantFiled: February 25, 2022Date of Patent: May 23, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hung Luong
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Publication number: 20220295005Abstract: A solid-state image sensor includes a pixel array section including a plurality of unit pixels each having a photoelectric conversion unit, the plurality of unit pixels being arranged in a matrix, a constant current source circuit unit having a constant current source connected to each of vertical signal lines provided in association with column arrangement of the pixel array section; and a control unit configured to control the constant current source circuit unit. The constant current source includes a plurality of transistors. The control unit switches, in a case where the plurality of transistors constituting the constant current source is regarded as one transistor having a gate width and a gate length being equivalent to each other, a ratio between the gate width and the gate length of the plurality of transistors on the basis of illumination in image-capturing environment.Type: ApplicationFiled: February 25, 2022Publication date: September 15, 2022Inventor: HUNG LUONG
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Patent number: 11350057Abstract: To improve an SN ratio in a solid-state imaging element provided with a capacitance for reducing a noise component. A first capacitance connection circuit connects one end of a first capacitance to a first signal line in a case where a first pixel signal is transmitted via the first signal line. A second capacitance connection circuit connects one end of a second capacitance to a second signal line in a case where a second pixel signal is transmitted via the second signal line. An intercapacitance connection circuit connects one end of each of the first capacitance and the second capacitance in a case where one of the first pixel signal and the second pixel signal is transmitted, and disconnects one end of each of the first capacitance and the second capacitance in a case where both the first pixel signal and the second pixel signal are transmitted.Type: GrantFiled: December 4, 2018Date of Patent: May 31, 2022Assignee: Sony Semiconductor Solutions CorporationInventor: Hung Luong
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Patent number: 11284033Abstract: A solid-state image sensor includes a pixel array section including a plurality of unit pixels each having a photoelectric conversion unit, the plurality of unit pixels being arranged in a matrix, a constant current source circuit unit having a constant current source connected to each of vertical signal lines provided in association with column arrangement of the pixel array section; and a control unit configured to control the constant current source circuit unit. The constant current source includes a plurality of transistors. The control unit switches, in a case where the plurality of transistors constituting the constant current source is regarded as one transistor having a gate width and a gate length being equivalent to each other, a ratio between the gate width and the gate length of the plurality of transistors on the basis of illumination in image-capturing environment.Type: GrantFiled: September 7, 2018Date of Patent: March 22, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Hung Luong
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Patent number: 11252355Abstract: The present technology relates to an image pickup device and an electronic device that enables a reduction in influence exerted by a dark current. The image pickup device and the electronic device include a sample and hold unit configured to perform sampling and holding of a pixel signal, an analog digital (AD) conversion unit configured to perform AD conversion of the pixel signal that includes a digit after a decimal point, a digital gain processing unit configured to apply a predetermined gain to a digital signal from the AD conversion unit, and a gain setting unit configured to set an analog gain of a column unit including the sample and hold unit and the AD conversion unit. The gain setting unit sets the analog gain in accordance with a measured dark current amount. The present technology can be applied, for example, to a CMOS image sensor.Type: GrantFiled: February 20, 2019Date of Patent: February 15, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Chihiro Okada, Hung Luong
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Publication number: 20210160443Abstract: The present technology relates to an image pickup device and an electronic device that enables a reduction in influence exerted by a dark current. The image pickup device and the electronic device include a sample and hold unit configured to perform sampling and holding of a pixel signal, an analog digital (AD) conversion unit configured to perform AD conversion of the pixel signal that includes a digit after a decimal point, a digital gain processing unit configured to apply a predetermined gain to a digital signal from the AD conversion unit, and a gain setting unit configured to set an analog gain of a column unit including the sample and hold unit and the AD conversion unit. The gain setting unit sets the analog gain in accordance with a measured dark current amount. The present technology can be applied, for example, to a CMOS image sensor.Type: ApplicationFiled: February 20, 2019Publication date: May 27, 2021Inventors: CHIHIRO OKADA, HUNG LUONG
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Publication number: 20200260035Abstract: A solid-state image sensor includes a pixel array section including a plurality of unit pixels each having a photoelectric conversion unit, the plurality of unit pixels being arranged in a matrix, a constant current source circuit unit having a constant current source connected to each of vertical signal lines provided in association with column arrangement of the pixel array section; and a control unit configured to control the constant current source circuit unit. The constant current source includes a plurality of transistors. The control unit switches, in a case where the plurality of transistors constituting the constant current source is regarded as one transistor having a gate width and a gate length being equivalent to each other, a ratio between the gate width and the gate length of the plurality of transistors on the basis of illumination in image-capturing environment.Type: ApplicationFiled: September 7, 2018Publication date: August 13, 2020Inventor: HUNG LUONG
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Patent number: 10506184Abstract: A solid-state image pickup element according to the present disclosure includes an analog circuit unit that performs reading of a pixel signal from a unit pixel and to perform A/D conversion processing, a digital circuit unit that performs signal output processing of outputting pixel data after the A/D conversion processing, in parallel with the reading of the pixel signal and the A/D conversion processing, and a control unit that causes the digital circuit unit to perform the processing over a period from a processing start timing to a processing finish timing in the analog circuit unit, while the control unit is controlling a speed of a clock being a criterion for an operation of the digital circuit unit.Type: GrantFiled: August 31, 2016Date of Patent: December 10, 2019Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Akihiko Kato, Hung Luong
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Publication number: 20180352178Abstract: A solid-state image pickup element according to the present disclosure includes: an analog circuit unit configured to perform reading of a pixel signal from a unit pixel and to perform A/D conversion processing; a digital circuit unit configured to perform signal output processing of outputting pixel data after the A/D conversion processing, in parallel with the reading of the pixel signal and the A/D conversion processing; and a control unit configured to cause the digital circuit unit to perform the processing over a period from a processing start timing to a processing finish timing in the analog circuit unit, while the control unit is controlling a speed of a clock being a criterion for an operation of the digital circuit unit.Type: ApplicationFiled: August 31, 2016Publication date: December 6, 2018Inventors: AKIHIKO KATO, HUNG LUONG
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Patent number: 6728929Abstract: A method and apparatus for calculating and inserting a TCP checksum neutralizing value into a network data packet in a manner which minimizes storage requirements and processing time used to process the data packet. In one embodiment, a checksum is calculated as a data packet is being received, up to the checksum field. The calculated checksum is then inserted into the checksum field. Then the remaining fields used to calculate the TCP checksum are summed. The inverse of this sum is then stored in a normally unused portion of the payload portion of the data packet near the end of the packet. When the packet is received and the TCP checksum is calculated, since the inverse of the fields which were not used to calculated the checksum in the TCP header is in the payload portion, their contribution to the checksum is negated so that a comparison of the calculated checksum and the stored TCP checksum will match, assuming the packet was properly received.Type: GrantFiled: February 16, 2001Date of Patent: April 27, 2004Assignee: Spirent Communications of Calabasas, Inc.Inventor: Hung Luong
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Patent number: 5467031Abstract: A CMOS tri-state driver circuit is capable of operating in a normal drive mode and in a high impedance mode. The circuit is powered by a 3 volt power supply, and drives an output terminal that is common to a TTL or other device that can apply a 5 volt output to the output terminal. The circuit includes a PMOS pull-up transistor and an NMOS pull-down transistor that are connected to the output terminal. The pull-up transistor is formed in and has a substrate terminal that is connected to an N-well. A switching transistor is controlled to connect the N-well to the power supply in drive mode to ensure stable and strong pull-up drive. A pass-gate transistor is biased to turn off the switching transistor when the voltage at the output terminal is higher than the power supply voltage in high impedance mode, causing the N-well to float. This prevents leakage current from flowing through a semiconductor junction from the output terminal to the N-well through the pull-up transistor.Type: GrantFiled: September 22, 1994Date of Patent: November 14, 1995Assignee: LSI Logic CorporationInventors: Trung Nguyen, Hung Luong