Patents by Inventor Hung-Min Chen

Hung-Min Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8603882
    Abstract: A method for making a dual silicide or germanide semiconductor comprises steps of providing a semiconductor substrate, forming a gate, forming source/drain regions, forming a first silicide, reducing spacers thickness and forming a second silicide. Forming a gate comprises forming an insulating layer over the semiconductor substrate, and forming the gate over the insulating layer. Forming source/drain regions comprises forming lightly doped source/drain regions in the semiconductor substrate adjacent to the insulating layer, forming spacers adjacent to the gate and over part of the lightly doped source/drain regions, and forming heavily doped source/drain regions in the semiconductor substrate. The first silicide is formed on an exposed surface of lightly and heavily doped source/drain regions. The second silicide is formed on an exposed surface of lightly doped source/drain regions. A first germanide and second germanide may replace the first silicide and the second silicide.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: December 10, 2013
    Assignee: National Applied Research Laboratories
    Inventors: Szu-Hung Chen, Hung-Min Chen, Yu-Sheng Lai, Wen-Fa Wu, Fu-Liang Yang
  • Publication number: 20130320408
    Abstract: A semiconductor device comprises a substrate, a metal-semiconductor compound layer and at least one kind of metal dopant. The substrate has a surface. The metal-semiconductor compound layer extends downwards into the substrate from the surface. The metal dopant which is made by one of a group of metal elements with atomic numbers ranging from 57 to 78 or the arbitrary combinations thereof and doped in the metal-semiconductor compound layer and the substrate with at least one peak concentration formed adjacent to the interface of the metal-semiconductor compound layer and the substrate.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 5, 2013
    Inventors: Szu-Hung CHEN, Hung-Min Chen, Wen-Fa Wu
  • Patent number: 8302299
    Abstract: A method of manufacturing a multilayer printed circuit board of a built-in electronic device provides a substrate having a copper clad laminate and a first dielectric layer. The first dielectric layer is laminated onto the copper clad laminate and has a cavity for accommodating the electronic device. A second dielectric layer is laminated onto the substrate and electronic device to produce a base circuit board with an embedded electronic device. A build-up circuit layer is formed on the base circuit board. The first and second dielectric layers are made of a plastic material.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: November 6, 2012
    Assignee: Unitech Printed Circuit Board Corp.
    Inventors: Cheng-Hsien Chou, Shun-Yueh Hsu, Kun-Chi Chen, Hung-Min Chen
  • Publication number: 20120190163
    Abstract: A method for making a dual silicide or germanide semiconductor comprises steps of providing a semiconductor substrate, forming a gate, forming source/drain regions, forming a first silicide, reducing spacers thickness and forming a second silicide. Forming a gate comprises forming an insulating layer over the semiconductor substrate, and forming the gate over the insulating layer. Forming source/drain regions comprises forming lightly doped source/drain regions in the semiconductor substrate adjacent to the insulating layer, forming spacers adjacent to the gate and over part of the lightly doped source/drain regions, and forming heavily doped source/drain regions in the semiconductor substrate. The first silicide is formed on an exposed surface of lightly and heavily doped source/drain regions. The second silicide is formed on an exposed surface of lightly doped source/drain regions. A first germanide and second germanide may replace the first silicide and the second silicide.
    Type: Application
    Filed: May 13, 2011
    Publication date: July 26, 2012
    Applicant: National Applied Research Laboratories
    Inventors: Szu-Hung Chen, Hung-Min Chen, Yu-Sheng Lai, Wen-Fa Wu, Fu-Liang Yang
  • Publication number: 20110225816
    Abstract: A method of manufacturing a multilayer printed circuit board of a built-in electronic device provides a substrate having a copper clad laminate and a first dielectric layer. The first dielectric layer is laminated onto the copper clad laminate and has a cavity for accommodating the electronic device. A second dielectric layer is laminated onto the substrate and electronic device to produce a base circuit board with an embedded electronic device. A build-up circuit layer is formed on the base circuit board. The first and second dielectric layers are made of a plastic material.
    Type: Application
    Filed: January 25, 2011
    Publication date: September 22, 2011
    Inventors: Cheng-Hsien CHOU, Shun-Yueh HSU, Kun-Chi CHEN, Hung-Min CHEN