Patents by Inventor Hung-Ming Weng

Hung-Ming Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240069277
    Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
  • Patent number: 9583527
    Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a floating diffusion disposed in the semiconductor material adjacent to a photodiode in the plurality of photodiodes. A transfer gate is disposed to transfer image charge generated in the photodiode into the floating diffusion. A first electrical contact with a first cross sectional area is coupled to the transfer gate. A second electrical contact with a second cross sectional area is coupled to the floating diffusion, and the second cross sectional area is greater than the first cross sectional area. The image sensor also includes pixel transistor region disposed in the semiconductor material including a first electrical connection to the semiconductor material. A third electrical contact with a third cross sectional area is coupled to the first electrical connection to the semiconductor material, and the third cross sectional area is greater than the first cross sectional area.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: February 28, 2017
    Assignee: OmniVision Technologies, Inc.
    Inventors: Kevin Ka Kei Leung, Hsin-Neng Tai, Hung-Ming Weng
  • Patent number: 9343499
    Abstract: An integrated circuit system includes a first device and second device wafer. A wafer bonding region is disposed at an interface of a front side of a first dielectric layer of the first device wafer and a front side of a second dielectric layer of the second device wafer such that wafer bonding region bonds the first device wafer to the second device wafer. The wafer bonding region includes dielectric material having a higher silicon concentration than a dielectric material of the first and second dielectric layers of the first and second device wafers. A conductive path couples a first conductor of the first device wafer to a second conductor of the second device wafer. The conductive path is formed in a cavity etched through the wafer bonding region between the first conductor and the second conductor.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: May 17, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Neng Tai, Hung-Ming Weng, Michael Chen, Chih-Huei Wu