Abstract: A packet processing system including an ingress unit, a detour launcher, a packet sequencer, a post-detour handler and an egress unit. The ingress unit is used to receive a packet. The detour launcher is used to detect a microburst according to at least a queue value and accordingly send the packet. The packet sequencer is used to attach a sequence number to the packet when the microburst emerges. The post-detoured handler is used to release the packet after the microburst has elapsed. The egress unit is used to output the packet processed by at least one member of a group consisting of the detour launcher, the packet sequencer and the post-detour handler.

Abstract: A packet processing system including an ingress unit, a detour launcher, a packet sequencer, a post-detour handler and an egress unit. The ingress unit is used to receive a packet. The detour launcher is used to detect a microburst according to at least a queue value and accordingly send the packet. The packet sequencer is used to attach a sequence number to the packet when the microburst emerges. The post-detoured handler is used to release the packet after the microburst has elapsed. The egress unit is used to output the packet processed by at least one member of a group consisting of the detour launcher, the packet sequencer and the post-detour handler.

Abstract: A method of resource allocation in a server system includes predicting a resource requirement of an application by adopting a neural network algorithm. When the resource requirement of the application is greater than a virtual machine allocation threshold, turn on a virtual machine for the application and adjust the value of the virtual machine allocation threshold to be the sum of the virtual machine allocation threshold and a resource capacity of the virtual machine.

Abstract: A soft error protection device includes a soft error resilient latch (SERL) and a latch coupled to a detection device and receiving a soft error pulse and a clock (CLK) signal respectively outputted by an electronic element and a CLK generator. The SERL delays the soft error pulse. In the period of a negative level of the CLK signal, the SERL stores the delayed soft error pulse corresponding to the negative level and used as a first detection data. Meanwhile, the latch stores the soft error pulse as a second detection data. The detection device receives the CLK signal, the first and second detection datum, and compares the first and second detection datum to send out a detection signal when the CLK signal rises from the negative level to a positive level.

Abstract: A soft error protection device is disclosed, which comprises a soft error resilient latch (SERL) and a latch coupled to a detection device and receiving a soft error pulse and a clock (CLK) signal respectively outputted by an electronic element and a CLK generator. The SERL delays the soft error pulse. In the period of a negative level of the CLK signal, the SERL stores the delayed soft error pulse corresponding to the negative level and used as a first detection data. Meanwhile, the latch stores the soft error pulse as a second detection data. The detection device receives the CLK signal, the first and second detection datum, and compares the first and second detection datum to send out a detection signal when the CLK signal rises from the negative level to a positive level.