Patents by Inventor Hung-San Lu

Hung-San Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240018685
    Abstract: A plating membrane includes a support structure extending radially outward from a nozzle that is to direct a flow of a plating solution toward a wafer. The plating membrane also includes a frame, supported by the support structure, having an inner wall that is angled outward from the nozzle. The outward angle of the inner wall relative to the nozzle directs a flow of plating solution from the nozzle in a manner that increases uniformity of the flow of the plating solution toward the wafer, reduces the amount of plating solution that is redirected inward toward the center of the plating membrane, reduces plating material voids in trenches of the wafer (e.g., high aspect ratio trenches), and/or the like.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 18, 2024
    Inventors: Yung-Hsiang CHEN, Hung-San LU, Ting-Ying WU, Chuang CHIHCHOUS, Yu-Lung YEH
  • Patent number: 11814743
    Abstract: A plating membrane includes a support structure extending radially outward from a nozzle that is to direct a flow of a plating solution toward a wafer. The plating membrane also includes a frame, supported by the support structure, having an inner wall that is angled outward from the nozzle. The outward angle of the inner wall relative to the nozzle directs a flow of plating solution from the nozzle in a manner that increases uniformity of the flow of the plating solution toward the wafer, reduces the amount of plating solution that is redirected inward toward the center of the plating membrane, reduces plating material voids in trenches of the wafer (e.g., high aspect ratio trenches), and/or the like.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Hsiang Chen, Hung-San Lu, Ting-Ying Wu, Chuang Chihchous, Yu-Lung Yeh
  • Publication number: 20220356594
    Abstract: A plating apparatus for electroplating a wafer includes a housing defining a plating chamber for housing a plating solution. A voltage source of the apparatus has a first terminal having a first polarity and a second terminal having a second polarity different than the first polarity. The first terminal is electrically coupled to the wafer. An anode is within the plating chamber, and the second terminal is electrically coupled to the anode. A membrane support is within the plating chamber and over the anode. The membrane support defines apertures, wherein in a first zone of the membrane support a first aperture-area to surface-area ratio is a first ratio, and in a second zone of the membrane support a second aperture-area to surface-area ratio is a second ratio, different than the first ratio.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Che-Min LIN, Hung-San Lu, Chao-Lung Chen, Chao Yuan Chang, Chun-An Kung, Chin-Hsin Hsiao, Wen-Chun Hou, Szu-Hung Yang, Ping-Ching Jiang
  • Patent number: 11401624
    Abstract: A plating apparatus for electroplating a wafer includes a housing defining a plating chamber for housing a plating solution. A voltage source of the apparatus has a first terminal having a first polarity and a second terminal having a second polarity different than the first polarity. The first terminal is electrically coupled to the wafer. An anode is within the plating chamber, and the second terminal is electrically coupled to the anode. A membrane support is within the plating chamber and over the anode. The membrane support defines apertures, wherein in a first zone of the membrane support a first aperture-area to surface-area ratio is a first ratio, and in a second zone of the membrane support a second aperture-area to surface-area ratio is a second ratio, different than the first ratio.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: August 2, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Che-Min Lin, Hung-San Lu, Chao-Lung Chen, Chao Yuan Chang, Chun-An Kung, Chin-Hsin Hsiao, Wen-Chun Hou, Szu-Hung Yang, Ping-Ching Jiang
  • Publication number: 20220025540
    Abstract: A plating apparatus for electroplating a wafer includes a housing defining a plating chamber for housing a plating solution. A voltage source of the apparatus has a first terminal having a first polarity and a second terminal having a second polarity different than the first polarity. The first terminal is electrically coupled to the wafer. An anode is within the plating chamber, and the second terminal is electrically coupled to the anode. A membrane support is within the plating chamber and over the anode. The membrane support defines apertures, wherein in a first zone of the membrane support a first aperture-area to surface-area ratio is a first ratio, and in a second zone of the membrane support a second aperture-area to surface-area ratio is a second ratio, different than the first ratio.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 27, 2022
    Inventors: Che-Min Lin, Hung-San Lu, Chao-Lung Chen, Chao Yuan Chang, Chun-An Kung, Chin-Hsin Hsiao, Wen-Chun Hou, Szu-Hung Yang, Ping-Ching Jiang
  • Publication number: 20210388523
    Abstract: A plating membrane includes a support structure extending radially outward from a nozzle that is to direct a flow of a plating solution toward a wafer. The plating membrane also includes a frame, supported by the support structure, having an inner wall that is angled outward from the nozzle. The outward angle of the inner wall relative to the nozzle directs a flow of plating solution from the nozzle in a manner that increases uniformity of the flow of the plating solution toward the wafer, reduces the amount of plating solution that is redirected inward toward the center of the plating membrane, reduces plating material voids in trenches of the wafer (e.g., high aspect ratio trenches), and/or the like.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Inventors: Yung-Hsiang Chen, Hung-San Lu, Ting-Ying Wu, Chuang Chihchous, Yu-Lung Yeh